International Symposium on Quality Electronic Design (ISQED)

Call for Papers

Program at a Glance

CalPT

ISQED 2019 Conference At-a-Glance*

Check out the Technical Papers for ISQED 2019
PDF version of Final Program

Wednesday, March 6, 2019

8:45am–9:45am	Plenary Session 1P Meeting Rooms 203/204 Keynote Speech:
8:45am–9:45am	Adversarial attacks on Security and Privacy of Machine Learning Systems Sandip Kundu - National Science Foundation(NSF)

9:45am-10:00am	Morning Break
10:00am–11:20am	Session 1A Machine Learning in Conventional and Emerging Platforms Meeting Room 201	Session 1B Modern High-Level and Logic Synthesis Meeting Room 206	Session 1C Emerging Memory and Spintronics Technologies for Future Energy Efficient Applications Meeting Room 207

11:20am–12:00pm	ISQED Luncheon & Panel Sponsored by Synopsys Meeting Rooms 203/204 Best Paper Awards Committee Recognition

12:00pm–1:25pm	Luncheon Panel Discussion Hype or hope: Is machine learning the next generation of design and design automation?
1:25pm-1:35pm	Break
1:35pm–2:35pm	Embedded Tutorial 1 Tools and approaches to efficiently implement Deep Learning in embedded systems Presenter: *Marc Duranton ,* CEA (French Atomic Energy Commission) Meeting Rooms 203/204
2:35pm-3:35pm	Embedded Tutorial 2 Spiking Neural Networks for Artificial Vision. From Sensing, to Processing and Learning Presenter: *B. Linares-Barranco ,* Scientist , Instituto de Microelectronica de Sevilla Meeting Rooms 203/204
3:35pm-3:45pm	Afternoon Break
3:45pm–5:25pm	Session 2A Advances in Simulation, Design Optimization and Debug Meeting Room 201	Session 2B System Level Tools, Flows, Methods Meeting Room 206	Session 2C High Performance Application Specific Architecture Meeting Room 207
5:25pm–6:55pm	Poster Papers & Mixer Room: Atrium

Thursday, March 7, 2019

9:00am–9:45am	Plenary Session 2P Meeting Rooms 203/204 Keynote Speech:
9:00am–9:45am	Machine Learning is Changing the Game for Variability and Characterization and will soon help Analog and Digital Verification Amit Gupta - General Manager of the IC Verification Solutions Solido division of Mentor, a Siemens Business
9:45am-10:00am	Morning Break
10:00am–11:20am	Session 3A Deep Learning Circuits and Architecures Meeting Room 201	Session 3B Innovations In Classic Hardware Security Problems Meeting Room 206	Session 3C Co-Optimizations of Device Performance and Design Reliability from State-of-the-art FinFET to Quantum Technologies Meeting Room 207
11:20am–11:40am	Morning Break
11:40am–1:00pm	Session 4A Artificial Intelligence for Efficient Application Specific Hardware Meeting Room 201	Session 4B Verification, ATPG and Failure Analysis Meeting Room 206
1:00pm-1:30pm	Lunch Break
1:30pm-2:30pm	Embedded Tutorial 3 Developments and Practices for Testing MRAM Memories Presenter: *Patrick Girard,* Research Director, LIRMM - CNRS / France Meeting Rooms 203/204
2:30pm-3:30pm	Embedded Tutorial 4 High Energy Efficient Reconfigurable Neural Network Processor Design Presenter: *Dr. Shouyi Yin,* Professor/Vice Director , Institute of Microelectronics Tsinghua University Meeting Rooms 203/204
3:30pm-3:40pm	Break
3:40pm-5:00pm	Session 5A Physical Design Optimization Meeting Room 201	Session 5B.1 3D Integration & Advanced Packaging Session 5B.2 Future of SOC Architectures and Verification Meeting Room 206

*This is a preliminary program and is subject to change

ISQED