Chia-Tung (Mark) Ho

About Chia-Tung (Mark) Ho

Chia-Tung has several years of industrial EDA experience under his belt. Before coming to US, he worked for IDM and EDA companies in Taiwan, developing in-house design for manufacturing (DFM) flow at Macronix, and fastSPICE at Mentor Graphics and Synopsys. During his PhD study at UCSD, he worked with the Design Technology Co-Optimization (DTCO) team in Synopsys as a technical intern from 2019 to 2021, also as an AI resident in X, the Google moonshot factory. His work has been recognized with the Best Paper Award at ISPD 2024, and LAD 2024. In Nvidia, he works as senior research scientist on ML/AI for VLSI, Agentic AI for chip design, custom circuit design, and standard cell layout synthesis.

Souvik Kundu

About Souvik Kundu

Souvik Kundu (Member IEEE, ACM) received his Ph.D. from the Electrical Engineering Department in University of Southern California USA. He is currently a Senior Staff Research Scientist at Intel Labs, USA, leading research efforts in post-training model optimization for GenAI efficiency. Souvik is the recipient of 2025 IEEE/ACM DAC under-40 innovator award. He has also received the 2024 Young Investigator recognition from the International Neural Network Society for his promising contributions in the field of neural networks. Souvik’s research interests broadly span from AI algorithms to AI hardware acceleration on various compute platforms. Many of his research outcomes have been productized including in Intel hardware and software optimization stack. Souvik serves as the “founding committee member” of the various conferences and workshops and TPC member of flagship venues including NeurIPS, ACL, and DAC.

Houman Homayoun

About Houman Homayoun

Houman Homayoun is currently a Professor in the Department of Electrical and Computer Engineering at the University of California, Davis. He is also the director of the National Science Foundation Center for Hardware and Embedded Systems Security and Trust (CHEST). Before that, he was an Associate Professor in the Department of Electrical and Computer Engineering at George Mason University (GMU). From 2010 to 2012, he spent two years at the University of California, San Diego, as NSF Computing Innovation (CI) Fellow awarded by the CRA-CCC. Houman graduated in 2010 from the University of California, Irvine, with a Ph.D. in Computer Science. He was a recipient of the four-year University of California, Irvine Computer Science Department chair fellowship. Houman received an MS degree in computer engineering in 2005 from the University of Victoria and a BS degree in electrical engineering in 2003 from the Sharif University of Technology. Houman conducts research in hardware security and trust, applied machine learning and AI, data-intensive computing, and heterogeneous computing, where he has published more than 200 technical papers in prestigious conferences and journals on the subject and directed over $10M in research funding from NSF, DARPA, AFRL, NIST, US Congress, and various industrial sponsors. His work received several best paper awards and nominations in various conferences, including GLSVLSI 2016, ICCAD 2019, ICDM 2019, DCAS 2020, ISVLSI 2020, ICCAD 2020, DATE 2022. His CHEST center received congressional support for research in HW security which was included in 2021 National Defense Authorization Act. Houman served as a Member of the Advisory Committee, Cybersecurity Research and Technology Commercialization working group in the Commonwealth of Virginia. He also served as core group member of the hardware security body of knowledge development team supported by the Department of Defense. He was a recipient of the 2010 National Science Foundation computing innovation fellow award by CCC/CRA. Since 2017 he has been serving as an Associate Editor of IEEE Transactions on VLSI. He chaired and co-chaired major conferences in ACM, including Great Lake Symposium on VLSI.

Ahmedullah Aziz

About Ahmedullah Aziz

Dr. Ahmedullah Aziz is an Assistant Professor of Electrical Engineering & Computer Science at the University of Tennessee, Knoxville, USA. He earned his Ph.D. in ECE from Purdue University in 2019, an MS degree in EE from the Pennsylvania State University in 2016, and a BS degree in EE from Bangladesh University of Engineering & Technology in 2013. He received several awards and accolades for his research, including the ‘Translational Research Award’ & ‘Chancellor’s Innovation Award’ from UT Knoxville (2024), ‘New Faculty Researcher Award’ from American Society of Engineering Educators (2024), 'ACM SIGDA Outstanding Ph.D. Dissertation Award (2021)' from the Association of Computing Machinery, 'Outstanding Graduate Student Research Award (2019)' from Purdue University, and 'Icon' award from Samsung (2013). He is a technical program committee (TPC) member for multiple flagship conferences (including DAC and ISCAS), and a reviewer for several reputed journals (including Nature, Advanced Materials). He serves as an editorial board member for multiple journals including - 'Scientific Reports', and the ‘Journal of Applied Physics'. He also served as a review panelist for the US Department of Energy, and the National Science Foundation (NSF). Dr. Aziz is an expert in device-circuit co-design and electronic design automation (EDA). His research portfolio comprises multiple avenues of nanoelectronics, spanning from device modeling to circuit/array design. Dr. Aziz has been a trailblazer in cryogenic memory technologies, facilitating critical advancements in quantum computing systems and space electronics.