ISQED 2015 Conference At-a-Glance
- Check out the Technical Papers for ISQED 2015
- PDF version of Final Program
Monday, March 2, 2015
| 9:00am–4:30pm |
Great America Meeting Room 3
The Frontiers of Robust Circuit Design in Sub-28nm Process Technologies Powering Microsystems Reliability Challenges in Sub 20nm Technology Secure Hardware in the Nano Era: Some New Directions Security and Validation in SoC Designs -
Cooperation, Conflicts, and Trade-offs
Neuromorphic Computing based Processors |
Tuesday, March 3, 2015
| 8:50am–10:00am |
Great America Ballroom
Keynote Speeches: | ||
Rethinking Design Creation, Verification and Validation for the Internet of Things George Zafiropoulos -Vice President of Solutions Marketing in the AWR Group , National Instruments | |||
What's Really Driving the Internet of Things? – Insights on the Market, Technology and Challenges Mike Ballard - Sr. Manager, Home Appliance Solutions and Smart Energy Groups , Microchip Technology | |||
| 10:00am-10:20am |
Morning Break |
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| 10:20am–12 Noon |
Robust Memory Design
Great America Meeting Room 1 |
Advances in Physical Design & Optimization
Great America Meeting Room 2 |
Manufacturing, Modeling, and Design Issues in Nanoscale CMOS
Great America Meeting Room 3 |
| 12 Noon–1:30pm |
Room: Silicon Valley
Best Paper Awards Committee Recognition Awards ISQED Fellow Award Luncheon Panel Discussion Industry Panel on Hardware and System Security ARM, Intel, Microsemi, Cadence, Freescale |
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| 1:30pm–3:30pm |
Voltage Regulators and Analog Design Great America Meeting Room 1 |
Architectural Analysis and Algorithms Great America Meeting Room 2 |
BIST and Scan Testing
Great America Meeting Room 3 |
| 3:30pm–3:50pm |
Afternoon Break |
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| 3:50pm–5:30pm |
Low Power Circuit Design
Great America Meeting Room 1 |
Energy and Power Management for IOT
Great America Meeting Room 2 |
Low-power and Robust Design Techniques
Great America Meeting Room 3 |
| 5:30pm–7:00pm |
Room: Atrium |
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Wednesday, March 4, 2015
| 8:55am–10:00am |
Great America Ballroom
Keynote Speeches: From Cluster to Cloud: How to Harness the Internet of Things Clodoaldo Barrera - Chief Technical Strategist , IBM |
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Connecting the Dots to achieve high Reliability and Quality Raj N. Master - General Manager, Reliability, Quality and Silicon Operations , Microsoft |
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| 10:00am–10:20am |
Morning Break |
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| 10:20am–12 Noon |
Challenges in SOC Design
Great America Meeting Room 1 |
Network and Multiprocessing Systems
Great America Meeting Room 2 |
Verification and Delay Measurement
Great America Meeting Room 3 |
| 12 Noon–1:00pm |
Lunch Break |
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| 1:00pm–3:00pm |
Hardware and System Security
Great America Meeting Room 1 |
Systems Implementation and Optimization
Great America Meeting Room 2 |
Packaging and 3D Integration '
Great America Meeting Room 3 |
| 3:00pm–3:20pm |
Afternoon Break |
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| 3:20pm–5:00pm |
Sensor Technology
Great America Meeting Room 1 |
EDA for Design Exploration & Analysis Beyond Moore's Law
Great America Meeting Room 2 |
Emerging Solid-State Device and Interconnect Technologies
Great America Meeting Room 3 |