Field solvers and parasitic extraction for advanced analog and digital designs
Session 2C
Wednesday March 24, 2010
10:30am–12 Noon
Room: Santa Clara
Dr. Maxim Ershov, Chief Scientist, Silicon Frontline
This tutorial discusses challenges and solutions of RC extraction for advanced high-speed digital and precision analog circuits. A need for accurate, reliable, and efficient capacitance extraction will be illustrated on practical examples, where 3D metal shapes, complicated BEOL stack, various manufacturing and other effects dominate design parasitics. A comparison of various extraction tools (including pattern-matching extractors, and mesh-based and mesh-less field solvers) will be given.