Mark M. Tehranipoor - Intel Charles E. Young Professor in Cybersecurity, Florida Institute for Cybersecurity
Hardware security domain has received significant attention from researchers in academia, industry, and government due mainly to the globalized design, fabrication, and assembly of integrated circuits and systems. The complexity of today’s electronic components and systems supply chain has made it increasingly vulnerable to malicious activities, security attacks, and counterfeiting activities. In this talk, we will first analyze these vulnerabilities and threats. We will then present challenges dealing with emerging attacks and threats and present potential solutions to addressing them. Finally, we will present opportunities that securing hardware can provide at different application domains, different levels of abstraction, and from nano-device to systems.
About Mark M. Tehranipoor
Mark Tehranipoor is currently the Intel Charles E. Young Professor in Cybersecurity at the ECE Department, University of Florida. His current research interests include: hardware security and trust, counterfeit electronics detection and prevention, supply chain risk management, and reliable and testable circuit design. Dr. Tehranipoor has published over 250 journal articles and refereed conference papers and has given more than 150 invited talks and keynote addresses since 2006. He has published six books and ten book chapters. He is a recipient of several best paper awards as well as the 2008 IEEE Computer Society (CS) Meritorious Service Award, the 2012 IEEE CS Outstanding Contribution, the 2009 NSF CAREER Award, and the 2014 MURI award. His projects are sponsored by both the industry (Semiconductor Research Corporation (SRC), Texas Instruments, Freescale, Comcast, Honeywell, LSI, Avago, Mentor Graphics,R3Logic, Cisco, Qualcomm, MediaTeck, etc.) and Government (NSF, ARO, MDA, DOD, AFOSR, DOE, etc.). He serves on the program committee of more than a dozen leading conferences and workshops. He served as Program and General Chairs of several leading conferences and workshops. Prior to joining UF, Dr. Tehranipoor was the founding director of CHASE and CSI centers at the University of Connecticut. He co-founded a new symposium called IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) and served as HOST-2008 and HOST-2009 General Chair. He is currently serving as HOST’s Chair of Steering Committee. He is also the co-founder of Trust-Hub (www.trust-hub.org). He served as an Associate EIC for IEEE Design & Test, an IEEE Distinguished Speaker, and an ACM Distinguished Speaker from 2010 to 2014. He is currently serving as an Associate Editor for JETTA, JOLPE, Transactions on VLSI (TVLSI), and Transactions on Design Automation for Electronic Systems (TODAES). Dr. Tehranipoor is a Senior Member and Golden Core Member of the IEEE and Member of ACM and ACM SIGDA.
Navraj Nandra - Senior Director of Interface IP - Synopsys
Keeping the enormous amounts of data being generated by billions of smart connected devices ultimately stored in the cloud – secure - is a hotly debated topic. The number of connected devices is expected to reach 50 billion by the end of this decade. Today, it is estimated that 70% of IoT devices contain serious security vulnerabilities, 100 car models are affected with security flaws. This presentation will provide proposals for integrated silicon solutions that help prevent a wide range of evolving security threats in connected devices such as theft, tampering, side channels attacks, malware and data breaches.
About Navraj Nandra
Navraj Nandra is the Sr. Director of Marketing for the DesignWare Interface and Analog IP at Synopsys. He has worked in the semiconductor industry since the mid 80's as an analog/mixed signal IC designer for Philips Semiconductors, Austria Micro Systems, (San Jose & Austria) and EM-Marin (Switzerland). He has been responsible for the complete design of a number of analog front ends in application areas such as digital audio, RFID and automotive. He joined Synopsys from Barcelona Design where he was Director of Application Engineering. During his four years at Barcelona he was responsible for pre- and post-sales support for Barcelona's analog synthesis technology. Navraj holds a masters degree in Microelectronics, majoring in analog IC design, from Brunel University and a post-graduate diploma in Process Technology from Middlesex University. He has presented at numerous technical conferences on mixed-signal design, analog IP and analog synthesis/EDA.