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ISQED 2002
CONFERENCE AT
A GLANCE
| Date | Time | Room 1 | Room 2 | Room 3 | Room 4 |
| Monday 3/18/02 | 8:30am-5:15pm | Tutorial
Track A Room: Monterey |
Tutorial
Track B Room: Carmel |
Tutorial
Track C Room: Santa Clara |
Tutorial
Track D Room: San Jose |
| 6:30pm-8:30pm | Evening Panel Discussion
EP1 & Dinner Are
the interoperability standards for EDA too little / too late for real SOC
designs? Room: Cascade/Sierra |
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| Tuesday 3/19/02 | 8:30am-12:00pm | PLENARY
SESSION I
Keynote Speeches by: John Chilton, David Lepejian, Jim Kupec, Buno Pati Followed by ISQED Best Paper Awards Room: Donner/Siskiyou |
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| 12:00pm-1:00pm | ISQED
LUNCHEON
Room: Sierra |
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| 1:00pm-3:10pm | Session
1A Interconnect Extraction and Modeling Room: Donner |
Session
1B Quality and Interoperability of EDA Tools Room: Siskiyou |
Session
1C Design for Test
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(Poster Session) 12:30-3:30 Room: Bayshore Foyer |
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| 3:10pm-3:30pm | BREAK | ||||
| 3:30pm-5:40pm | Session
2A Design for Process Variations Room: Donner |
Session
2B Power, Signal and EMI Analysis and Optimization Room: Siskiyou |
Session
2C Methods and Metrics for Design Quality Room: Oak |
Speaker
Practice Room: Riesling
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| 6:30pm-8:30pm | Evening Panel Discussion
EP2
Process
Variation: Is it too much to handle? Room: Cascade/Sierra |
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| Wednesday 3/20/02 | 8:30am-11:50am | PLENARY
SESSION II
Keynote speeches by: Atiq Raza, Bob Brodersen, Chan Shin Wu, Ulf Schlichtmann Room: Donner/Siskiyou |
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| 12:00PM-1:00pm | Lunch Break | ||||
| 1:00pm-3:10pm | SESSION
3A Design Issues for Power and Noise Management Room: Donner |
SESSION
3B Verification in Achieving Design Quality Room: Siskiyou |
SESSION
3C Signal Integrity Room: Oak |
12:30-3:30 Room: Bayshore Foyer |
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| 3:10pm-3:30pm | BREAK | ||||
| 3:30pm-5:15pm | SESSION
4A Low Power Design Tecniques Room: Donner |
SESSION
4B Advanced Device Technology Issues in Circuit Design Room: Siskiyou |
SESSION
4C Design, Planning and Closure Room: Oak |
Speaker
Practice Room: Riesling |
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| Thursday 3/21/02 | 8:30am-5:15pm | Workshop
I Room: San Jose |
Workshop
II Room: Santa Clara |
Workshop
III Room: Carmel |
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|
International Symposium
on Quality of Electronic Design |
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