ISQED 2023: Program

March 26, 2023


SESSION 1A

Wednesday April 5

Next Generation Computing Systems

Chair: Arnab Raha, Intel
Co-Chair: Kang Jun Bai, AFRL

38    10:20AM
1A.1
A SPICE-based Framework to Emulate Quantum Circuits with classical LC Resonators
Md Mazharul Islam1, Shafayat Hossain2, Ahmedullah Aziz3
1The University of Tennessee, 2Princeton University, 3University of Tennessee, Knoxville

152    10:40AM
1A.2
Metal Inter-layer Via Keep-out-zone in M3D IC: A Critical Process-aware Design Consideration
Madhava Sarma Vemuri and Umamaheswara Tida
North Dakota State University

94    11:00AM
1A.3
AGNI: In-Situ, Iso-Latency Stochastic-to-Binary Number Conversion for In-DRAM Deep Learning
Supreeth Mysore Shivanandamurthy, Sairam Sri Vatsavai, Ishan Thakkar, sayedahmad salehi
University of Kentucky

50    11:20AM
1A.4
Design and Evaluation of multipliers for hardware accelerated on-chip EdDSA
Harshita Gupta1, Mayank Kabra2, Nitin Patwari3, Prashanth H C4, Madhav Rao5
1Thapar institute of information technology, Patiala, 2Student, 3Student, IIITB, 4IIIT-Bangalore, 5International Institute of Information Technology-Bangalore


SESSION 1B

Wednesday April 5

Design for Testability and Verification

Chair: Chidhambaranathan R, Synopsys

120    10:20AM
1B.1
Self-Checking Performance Verification Methodology for Complex SoCs
Prokash Ghosh1, Aditya Chopra1, Dwaraka Pai2, Baljinder Sood2
1NXP Semiconductor Inc, USA, 2NXP Semiconductors Inc, USA

22    10:40AM
1B.2
Polynomial Formal Verification of a Processor: A RISC-V Case Study
Lennart Weingarten1, Alireza Mahzoon1, Mehran Goli1, Rolf Drechsler2
1University of Bremen, 2University of Bremen/DFKI

150    11:00AM
1B.3
Application of Machine Learning for Quality Risk Factor Analysis of Electronic Assemblies
Brendan Reidy1, David Duggan1, Bernard Glasauer2, Peng Su2, Ramtin Zand1
1University of South Carolina, 2Component Engineering, Juniper Networks

70    11:20AM
1B.4
Quality-driven Design Methodology for PUFs in FPGAs for Secure IoT
Xiangyun Wang1, Yicheng Song1, Katyayani Prakash1, Zeljko Zilic1, Tomas Langsetmo2
1McGill University, 2KNOX Industries Inc.


SESSION 1C

Wednesday April 5

AI Applications in Computing System Design

Chair: Hossein Sayadi, California State University, Long Beach

174    10:20AM
1C.1
HD2FPGA: Automated Framework for Accelerating Hyperdimensional Computing on FPGAs
Tianqi Zhang1, Sahand Salamat2, Behnam Khaleghi2, Justin Morris3, Baris Aksanli4, Tajana Rosing1
1UCSD, 2University of California, San Diego, 3CSUSM, 4San Diego State University

114    10:40AM
1C.2
XOR-CiM: An Efficient Computing-in-SOT-MRAM Design for Binary Neural Network Acceleration
Mehrdad Morsali1, Ranyang Zhou1, Sepehr Tabrizchi2, Arman Roohi3, Shaahin Angizi1
1New jersey Institute of Technology, 2University of Nebraska–Lincoln, 3University of Nebraska - Lincoln

117    11:00AM
1C.3
Security and Reliability Challenges in Machine Learning for EDA: Latest Advances
Zhiyao Xie, Tao Zhang, Yifeng Peng
Hong Kong University of Science and Technology

187    11:20AM
1C.4
Image-Based Zero-Day Malware Detection in IoMT Devices: A Hybrid AI-Enabled Method
Zhangying He and Hossein Sayadi
California State University, Long Beach


SESSION 2A

Wednesday April 5

Advances in Circuit and Physical Design

Chair: Rui Zhang, Cadence Inc.
Co-Chair: Sheikh Ariful Islam, University of Texas Rio Grande Valley

101    1:30PM
2A.1
Routability-aware Placement Guidance Generation for Mixed-size Designs
Chieh-Yu Cheng and Ting-Chi Wang
National Tsing Hua University

103    1:50PM
2A.2
MC-MCF: A Multi-Capacity Model for Ordered Escape Routing
Zhenyi Gao, Sheqin Dong, Zhicong Tang, Wenjian Yu
Tsinghua University

137    2:10PM
2A.3
DC-Model: A New Method for Assisting the Analog Circuit Optimization
Yuan Wang, Jian Xin, Haixu Liu, Qian Qin, Chenkai Chai, Yukai Lu, Jinglei Hao, Jianhao Xiao, Zuochang Ye, Yan Wang
Tsinghua University

146    2:30PM
2A.4
Accounting for Floorplan Irregularity and Configuration Dependence in FPGA Routing Delay Models
Gabriel Barajas1, Jonathan Greene2, Fei Li1, James Tandon3
1Microchip, 2Cambios Computing LLC, 3California State University East Bay

171    2:50PM
2A.5
An Effective Cost-Skew Tradeoff Heuristic for VLSI Global Routing
Andrew Kahng1, Shreyas Thumathy2, Mingyu Woo3
1UCSD CSE and ECE Departments, 2Canyon Crest Academy, 3UCSD ECE Department


SESSION 2B

Wednesday April 5

Recent Advances in Secure Hardware Design

Chair: Soheil Salehi, University of Arizona

14    1:30PM
2B.1
Automated Supervised Topic Modeling Framework for Hardware Weaknesses
Rakibul Hassan1, Charan Bandi1, Meng-Tien Tsai2, Shahriar Golchin3, Sai Manoj Pudukotai Dinakarrao1, Setareh Rafatirad2, Soheil Salehi4
1George Mason University, 2University of California Davis, 3University of Arizona, 4Department of Electrical and Computer Engineering, University of Arizona

19    1:50PM
2B.2
Polymorphic Sensor to Detect Laser Logic State Imaging Attack
Sourav Roy1, Shahin Tajik2, Domenic Forte1
1University of Florida, 2Worcester Polytechnic Institute

122    2:10PM
2B.3
Low Overhead System-Level Obfuscation through Hardware Resource Sharing
Daniel Xing1, Michael Zuzak2, Ankur Srivastava1
1University of Maryland, 2Rochester Institute of Technology

79    2:30PM
2B.4
SPRED: Spatially Distributed Laser Fault Injection Resilient Design
tasnuva farheen1, Shahin Tajik2, Domenic Forte1
1University of Florida, 2Worcester Polytechnic Institute

98    2:50PM
2B.5
Enlarging Reliable Pairs via Inter-Distance Offset for a PUF Entropy-Boosting Algorithm
Md Omar Faruque and Wenjie Che
New Mexico State University


SESSION 2C

Wednesday April 5

Efficiency and Reliabiity of Memory

Chair: Hongyu An, Michigan Technological University

49    1:30PM
2C.1
eDRAM-OESP: A novel performance efficient in-embedded-DRAM-compute design for on-edge signal processing application
Mayank Kabra1, Prashanth H C2, Kedar Deshpande1, Madhav Rao3
1Student, 2IIIT-Bangalore, 3International Institute of Information Technology-Bangalore

115    1:50PM
2C.2
CMDS: Cross-layer Dataflow Optimization for DNN Accelerators Exploiting Multi-bank Memories
Man Shi1, Steven Colleman1, Charlotte VanDeMieroop1, Antony Joseph2, Maurice Meijer2, Wim Dehaene1, Marian Verhelst1
1KU Leuven, 2NXP Semiconductor

127    2:10PM
2C.3
HIE-DRAM: High-Performance Efficient In-DRAM Computing Architecture for SIMD
Mayank Kabra1, Prashanth H C2, Kedar Deshpande1, Madhav Rao3
1Student, 2IIIT-Bangalore, 3International Institute of Information Technology-Bangalore

168    2:30PM
2C.4
AGRAS: Aging and memory request rate aware scheduler for PCM memories
Aswathy NS1 and Hemangee Kapoor2
1IIT Guwahati, 2Indian Institute of Technology Guwahati


SESSION PW1

Thursday April 6

PW1

Chair: Hossein Sayadi, California State University, Long Beach

4    9:40AM
PW1.1
Accurate Estimation of Circuit Delay Variance with Limited Monte Carlo Simulations Using Bayesian Inference
Chithira R.
National Institute of Technology Calicut

9    9:45AM
PW1.2
DSEAdd: FPGA based Design Space Exploration for Approximate Adders with Variable Bit-precision
Archie Mishra and Nanditha Rao
IIIT Bangalore

18    9:50AM
PW1.3
Emerging Interconnect Exploration for SRAM Application Using Nonconventional H-Tree and Center-Pin Access
Zhenlin Pei1, Mahta Mayahinia2, Hsiao-Hsuan Liu3, Mehdi Tahoori2, Shairfe Salahuddin4, Francky Catthoor4, Zsolt Tokei4, Chenyun Pan5
1The University of Texas at Arlington, 2Karlsruhe institute of technology (KIT), 3Katholieke Universiteit Leuven (KU Leuven), 4IMEC, 5University of Texas at Arlington

23    9:55AM
PW1.4
A Low-overhead PUF-based Secure Scan Design
Wei Zhou1, Aijiao Cui1, Cassi Chen2, Gang Qu3
1Harbin Institute of Technology (Shenzhen), 2University of California, Berkeley, 3University of Maryland

31    10:00AM
PW1.5
Deep Image Segmentation for Defect Detection in Photo-lithography Fabrication
Omari Paul1, Sakib Abrar1, Richard Mu1, Riadul Islam2, Manar Samad1
1Tennessee State University, 2University of Maryland at Baltimore County

36    10:05AM
PW1.6
Performance Analysis of Cylindrical Through Silicon Via with Interfacial Crack
Vandana Kumari, Maya Chandrakar, Manoj Majumder
IIIT Naya Raipur

54    10:10AM
PW1.7
A Flexible Cluster Tool Simulation Framework with Wafer Batch Dispatching Time Recommendation
Hsin-Ping Yen1, Shiuan-Hau Huang1, Yan-Hsiu Liu2, Kuang-Hsien Tseng2, Ji-Fu Kung2, Yi-Ting Li1, Yung-Chih Chen3, Chun-Yao Wang4
1National Tsing Hua University, 2United Microelectronics Corporation, 3National Taiwan University of Science and Technology, 4Dept. CS, National Tsing Hua University

59    10:15AM
PW1.8
Hardware Performance Counter Enhanced Watchdog for Embedded Software Security
Karl Ott1 and Rabi N. Mahapatra2
1Texas A&M University, 2Professor

60    10:20AM
PW1.9
Power Savings in USB Hubs Through a Proactive Scheduling Strategy
Bikrant Das Sharma1, Abdul Ismail2, Chris Meyers3
1Rice University, 2Intel Corporation, USB Implementers Forum, 3Fresco Logic

63    10:25AM
PW1.10
DK Lock: Dual Key Logic Locking Against Oracle-Guided Attacks
Jordan Maynard1 and Amin Rezaei2
1California State University Long Beach, 2California State University, Long Beach


SESSION PW2

Thursday April 6

PW2

Chair: Kang Jun Bai, AFRL

69    9:40AM
PW2.1
Reproducing Fear Conditioning of Rats with Unmanned Ground Vehicles and Neuromorphic Systems
Noah Zins and Hongyu An
Michigan Technological University

71    9:45AM
PW2.2
High-Throughput Hardware Implementation for Haraka in SPHINCS+
Yueqin Dai, Yifeng Song, Jing Tian, Zhongfeng Wang
Nanjing University

74    9:50AM
PW2.3
Analysis of Machine Learning Techniques for Time Domain Waveform Prediction in Analog and Mixed Signal Integrated Circuit Verification
Dhanasekar V1, Vinodhini Gunasekaran1, Anusha Challa1, Bama Srinivasan1, Dhurga Devi J1, Selvi Ravindran1, Ranjani Parthasarathi1, Ramakrishna P V1, Gopika Geetha Kumar2, Venkateswaran Padmanabhan3, Guha Lakshmanan3, Lakshmanan Balasubramanian3
1College of Engineering Guindy, Anna University, 2Carnegie Mellon University, Pennsylvania, 3Texas Instruments (India) Pvt. Ltd.

75    9:55AM
PW2.4
Focusing on the Key Suspicious Trojan Nets with a Collaborative Approach
Shih-Lung Pao1, Chuan-Pin Huang1, Yen-Chi Peng1, Ing-Jer Huang2
1Department of Computer Science and Engineering, National Sun Yat-Sen University, 2Department of Computer Science and Engineering, Digital Content and Multimedia Technology Research Center, National Sun Yat-Sen University

134    10:00AM
PW2.5
CMP-SiL: Confidential Multi Party Software-in-the-Loop Simulation Framework
Shalabh Jain1, Pradeep Pappachan1, Jorge Guajardo2, Sven Trieflinger3, Indrasen Raghupatruni3, Thomas Huber3
1Robert Bosch LLC, 2Bosch Research and Technology Center, Robert Bosch LLC, 3Robert Bosch GmbH

81    10:05AM
PW2.6
A2OP: an A* Algorithm OPtimizer with the Heuristic Function for PCB Automatic Routing
Quanbao Guo and Keni Qiu
Capital Normal University

82    10:15AM
PW2.7
Decomposable Architecture and Fault Mitigation Methodology for Deep Learning Accelerators
Ning-Chi Huang1, Min-Syue Yang1, Ya-Chu Chang1, Kai-Chiang Wu2
1Department of Computer Science, National Yang Ming Chiao Tung University, 2Department of Computer Science, National Chiao Tung University

97    10:20AM
PW2.8
NetViz: A Tool for Netlist Security Visualization
James Geist1, Travis Meade1, Shaojie Zhang1, Yier Jin2
1University of Central Florida, 2University of Florida

102    10:25AM
PW2.9
A True Random Number Generator for Probabilistic Computing using Stochastic Magnetic Actuated Random Transducer Devices
Ankit Shukla1, Laura Heller1, Md Golam Morshed2, Laura Rehm3, Avik Ghosh2, Andrew Kent3, Shaloo Rakheja1
1University of Illinois at Urbana-Champaign, 2University of Virginia, 3New York University

108    10:30AM
PW2.10
Attributed Graph Transformation for Generating Synthetic Benchmarks for Hardware Security
Juneeth kumar Meka and Ranga Vemuri
University of Cincinnati


SESSION PW3

Thursday April 6

PW3

Chair: Vidya Chhabria, Arizona State University

112    9:40AM
PW3.1
Secure Control Loop Execution of Cyber-Physical Devices Using Predictive State Space Checks
Kwondo Ma1, Chandramouli Amarnath1, Abhijit Chatterjee1, Jacob Abraham2
1Georgia Institute of Technology, 2University of Texas at Austin

131    9:45AM
PW3.2
Cryogenic In-memory Binary Multiplier Using Quantum Anomalous Hall Effect Memories
Arun Govindankutty1, Shamiul Alam2, Sanjay Das1, Ahmedullah Aziz2, Sumitha George1
1North Dakota State University, 2The University of Tennessee, Knoxville

140    9:50AM
PW3.3
SQRTLIB : Library of Hardware Square Root Designs
Prashanth H C1, Sriniketh S S2, Shrikrishna Hebbar2, Chinmaye R2, Madhav Rao3
1IIIT-Bangalore, 2RVCE, 3International Institute of Information Technology-Bangalore

148    9:55AM
PW3.4
Binary Synaptic Array for Inference and Training with Built-in RRAM Electroforming Circuit
Ashvinikumar Dongre and Gaurav Trivedi
Indian Institute of Technology Guwahati India

149    10:00AM
PW3.5
Neural Network Partitioning for Fast Distributed Inference
Robert Viramontes and Azadeh Davoodi
University of Wisconsin - Madison

155    10:05AM
PW3.6
DAGGER: Exploiting Language Semantics for Program Security in Embedded Systems
Garett Cunningham, Harsha Chenji, Gordon Stewart, David Juedes, Avinash Karanth
Ohio University

156    10:10AM
PW3.7
Exploiting Programmable Dipole Interaction in Straintronic Nanomagnet Chains for Ising Problems
Nastaran Darabi1, Maeesha Binte Hashem1, Supriyo Bandyopadhyay2, Amit Trivedi1
1University of Illinois at Chicago, 2Virginia Commonwealth University

157    10:15AM
PW3.8
A Bit-Parallel Deterministic Stochastic Multiplier
Sairam Sri Vatsavai and Ishan Thakkar
University of Kentucky

158    10:20AM
PW3.9
ACPC: Covert Channel Attack on Last Level Cache using Dynamic Cache Partitioning
Jaspinder Kaur1 and Shirshendu Das2
1Indian Institute of Technology Ropar, 2Indian Institute of Technology Hyderabad

169    10:25AM
PW3.10
Intrinsic Parameter Fluctuation and Process Variation Effect of Vertically Stacked Silicon Nanosheet Complementary Field-Effect Transistors
Sekhar Kola, Yiming Li, Min-Hui Chuang
National Yang Ming Chiao Tung University

176    10:30AM
PW3.11
SpotOn: A Gradient-based Targeted Data Poisoning Attack on Deep Neural Networks
Yash Khare1, Kumud Lakara2, Sparsh Mittal3, Arvind Kaushik4, Rekha Singhal5
1Amrita Vishwa Vidyapeetham, 2Manipal Institute of Technology, 3IIT Roorkee, 4NXP Semiconductors, 5TCS Research


SESSION 3A

Thursday April 6

ML based CAD for Optimization

Chair: Murthy Palla, Synopsys Inc.
Co-Chair: Rui Zhang, Cadence Inc.

29    10:45AM
3A.1
PreAxC: Error Distribution Prediction for Approximate Computing Quality Control using Graph Neural Networks
Lakshmi Sathidevi1, Abhinav Sharma2, Nan Wu3, Xun Jiao4, Cong "Callie" Hao1
1Georgia Institute of Technology, 2Indian Institute of Information Technology, Guwahati, 3UC Santa Barbara, 4Villanova University

86    11:05AM
3A.2
DeepAxe: A Framework for Exploration of Approximation and Reliability Trade-offs in DNN Accelerators
Mahdi Taheri1, Mohamad Riazati2, Mohammad Hasan Ahmadilivani3, Maksim Jenihhin3, Masoud Daneshtalab2, Jaan Raik4, Mikael Sjödin2, Björn Lisper2
1PhD researcher at Tallinn university of Technology, 2Mälardalen University, Västerås, 3Tallinn University of Technology, Tallinn, Estonia, 4Tallinn University of Technology, Tallinn

121    11:25AM
3A.3
TOTAL: Topology Optimization of Operational Amplifier via Reinforcement Learning
Zihao Chen, Songlei Meng, Fan Yang, Li Shang, Xuan Zeng
Fudan University

154    11:45AM
3A.4
Design of Hardware Accelerators to Compute Parametric Capacitance Tables
Sandeep Koranne
Mentor Graphics Corporation

175    12:05PM
3A.5
Dilated Involutional Pyramid Network (DInPNet): A Novel Model for Printed Circuit Board (PCB) Components Classification
Ananya Mantravadi1, Dhruv Makwana2, Sai Chandra Teja R2, Sparsh Mittal3, Rekha Singhal4
1IIIT Raichur, 2Independent Researcher, 3IIT Roorkee, 4TCS Research


SESSION 3B

Thursday April 6

AI Accelerator Hardware Design

Chair: Kang Jun Bai, AFRL
Co-Chair: Ji Li, MicroSoft

51    10:45AM
3B.1
An Optical XNOR-Bitcount Based Accelerator for Efficient Inference of Binary Neural Networks
Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi, Ishan Thakkar
University of Kentucky

160    11:05AM
3B.2
Heterogeneous Multi-Functional Look-Up-Table-based Processing-in-Memory Architecture for Deep Learning Acceleration
Sathwika Bavikadi1, Purab Ranjan Sutradhar2, Amlan Ganguly2, Sai Manoj Pudukotai Dinakarrao1
1George Mason University, 2Rochester Institute of Technology

135    11:25AM
3B.3
HFGCN: High-speed and Fully-optimized GCN Accelerator
MinSeok Han1, Jiwan Kim1, Donggeon Kim1, Hyunuk Jeong1, Gilho Jung1, Myeongwon Oh1, Hyundong Lee2, Yunjeong Go2, HyunWoo Kim1, Jongbeom Kim1, Taigon Song1
1Kyungpook National University (KNU), 2Kyungpook National University

90    11:45AM
3B.4
Knowledge Distillation between DNN and SNN for Intelligent Sensing Systems on Loihi Chip
Shiya Liu1 and Yang Yi2
1EMD Electronics, 2Virginia Tech

142    12:05PM
3B.5
Lightweight Instruction Set for Flexible Dilated Convolutions and Mixed-Precision Operands
Simon Friedrich1, Shambhavi Balamuthu Sampath2, Robert Wittig1, Manoj Rohit Vemparala3, Nael Fasfous3, Emil Matus4, Walter Stechele5, Gerhard Fettweis1
1TU Dresden, 2BMW, 3BMW AG, 4Technische Universität Dresden, 5TUM


SESSION 3C

Thursday April 6

Intelligent Edge Computing

Chair: Hossein Sayadi, California State University, Long Beach

186    10:45AM
3C.1
PriML: An Electro-Optical Accelerator for Private Machine Learning on Encrypted Data
Mengxin Zheng1, Fan Chen1, Lei Jiang1, Qian Lou2
1Indiana University Bloomington, 2University of Central Florida

191    11:05AM
3C.2
ISSAC: An Self-organizing and Self-healing MAC Design for Intermittent Communication Systems
Ruben Dominguez1, Wen Zhang1, Hongzhi Xu2, Pablo Rangel3, Chen Pan4
1Texas A&M University - Corpus Christi, 2Jishou University, 3Texas A&M University - Corpus Christi, 4Texas A&M University-Corpus Christi

188    11:25AM
3C.3
A Deep Learning Approach for Ventricular Arrhythmias Classification using Microcontroller
Ya-sine Agrignan1, Shanglin Zhou1, Jun Bai1, Sahidul Islam2, Sheida Nabavi1, Mimi Xie2, Caiwen Ding1
1University of Connecticut, 2University of Texas at San Antonio

189    11:45AM
3C.4
Reinforcement Learning-Based Guidance of Autonomous Vehicles
Joseph Clemmons and Yufang Jin
University of Texas at San Antonio


SESSION 4A

Thursday April 6

Advances in Analysis, Simulation and Computing

Chair: Chidhambaranathan Rajamanikkam, Utah State University
Co-Chair: Anand Iyer, Synopsys Inc.

24    2:10PM
4A.1
Fast Electromigration Simulation for Chip Power Grids
Bijan Shahriari and Farid Najm
University of Toronto

93    2:30PM
4A.2
On-Interposer Decoupling Capacitors Placement for Interposer-based 3DIC
Po-Yang Chen, Chang-Yun Liu, Hung-Ming Chen, Po-Tsang Huang
National Yang Ming Chiao Tung University

96    2:50PM
4A.3
Analysis of Pattern-dependent Rapid Thermal Annealing Effects on SRAM Design
Vidya Chhabria1 and Sachin S. Sapatnekar2
1Arizona State University, 2University of Minnesota

109    3:10PM
4A.4
Reverse Engineering Word-Level Models from Look-Up Table Netlists
Ram Venkat Narayanan, Aparajithan Nathamuni-Venkatesan, Kishore Pula, Sundarakumar Muthukumaran, Ranga Vemuri
University of Cincinnati

92    3:30PM
4A.5
Novel Implementation of High-Performance Polynomial Multiplication for Unified KEM Saber based on TMVP Design Strategy
Pengzhou He and Jiafeng Xie
Villanova University


SESSION 4B

Thursday April 6

Hardware Security: Attacks and Defenses

Chair: Soheil Salehi, University of Arizona

39    2:10PM
4B.1
Unraveling Latch Locking Using Machine Learning, Boolean Analysis, and ILP
Dake Chen1, Xuan Zhou1, Yinghua Hu1, Yuke Zhang1, Kaixin Yang1, Andrew Rittenbach2, Pierluigi Nuzzo1, Peter Beerel3
1University of Southern California, 2USC Information Sciences Institute, 3Univ. of Southern California

141    2:30PM
4B.2
Resynthesis-based Attacks Against Logic Locking
Felipe Almeida1, Levent Aksoy1, Quang-Linh Nguyen2, Sophie Dupuis2, Marie-Lise Flottes3, Samuel Pagliarini4
1Tallinn University of Technology, 2LIRMM, 3LIRMM CNRS, 4Tallinn University of Technology (TalTech)

167    2:50PM
4B.3
VAST: Validation of VP-based Heterogeneous Systems against Availability Security Properties using Static Information Flow Tracking
Ece Demirhan Coskun1, Muhammad Hassan1, Mehran Goli2, Rolf Drechsler2
1Cyber-Physical Systems, DFKI GmbH, 2Institute of Computer Science, University of Bremen

41    3:10PM
4B.4
MAAS: Hiding Trojans in Approximate Circuits
Qazi Arbab Ahmed1, Muhammad Awais1, Marco Platzner2
1Paderborn Univeristy, 2Paderborn University

106    3:30PM
4B.5
Efficient Decryption Architecture for Classic McEliece
Xinyuan Qiao, Suwen Song, Jing Tian, Zhongfeng Wang
Nanjing University


SESSION 4C

Thursday April 6

Design for Heterogeneous Integration

Chair: Gina Adam, George Washington University

182    2:10PM
4C.1
Testbench on a Chip: A Yield Test Vehicle for Resistive Memory Devices
Luke Upton1, Guenole Lallement1, Michael Scott1, Joyce Taylor2, Robert Radway1, Dennis Rich1, Mark Nelson3, Subhasish Mitra1, Boris Murmann1
1Stanford University, 2Intrinsix Corporation, 3SkyWater Technology

183    2:30PM
4C.2
Integrating emerging devices with CMOS for analog in-memory computing
Qiangfei Xia
University of Massachusetts Amherst

184    2:50PM
4C.3
Integrating Emerging Memories for Analog DNN Accelerators
An Chen
IBM

185    3:10PM
4C.4
An Infrastucture for Large-scale Reconfigurable Neuronal Network Emulations
Gopabandhu Hota and Gert Cauwenberghs
UC San Diego


SESSION 5A

Friday April 7

Low Power Circuit Design

Chair: Amit Trivedi, University of Illinois at Chicago
Co-Chair: Hongyu An, Michigan Technological University

173    9:00AM
5A.1
A Novel Pseudo-Flash Based Digital Low Dropout (LDO) Voltage Regulator
Cheng-Yen Lee1, Sunil Khatri1, Sarma Vrudhula2
1Texas A&M University, 2Arizona State University

20    9:20AM
5A.2
A Low Power SRAM with Fully Dynamic Leakage Suppression for IoT Nodes
Jun Yin and Mircea Stan
University of Virginia

118    9:40AM
5A.3
Error Diluted Approximate Multipliers Using Positive And Negative Compressors
Bindu G Gowda1, Prashanth H C2, Madhav Rao3
1International Institute of Information Technology Bangalore, 2IIIT-Bangalore, 3International Institute of Information Technology-Bangalore

138    10:00AM
5A.4
Scalable Low-Cost Sorting Network with Weighted Bit-Streams
Brady Prince1, Hassan Najafi2, Bingzhe Li1
1Oklahoma State University, 2University of Louisiana


SESSION 5B

Friday April 7

Advance Secure Circuits and Hardware Trojan Detection

Chair: Setareh Rafatirad, University of California Davis

177    9:00AM
5B.1
Novel, Configurable Approximate Floating-point Multipliers for Error-Resilient Applications
Vishesh Mishra1, Sparsh Mittal2, Rekha Singhal3, Manoj Nambiar3
1IIT Kanpur, 2IIT Roorkee, 3TCS Research

161    9:20AM
5B.2
Design Space Exploration of Modular Multipliers for ASIC FHE accelerators
Deepraj Soni1, Mohammed Nabeel Thari Moopan2, Homer Gamil3, Oleg Mazonka4, Brandon Reagen5, Ramesh Karri6, Michail Maniatakos4
1New York University Tandon School of Engineering, 2New York University, 3NYUAD, 4New York University Abu Dhabi, 5NYU/Facebook, 6NYU

13    9:40AM
5B.3
H-Saber: An FPGA-Optimized Version for Designing Fast and Efficient Post-Quantum Cryptography Hardware Accelerators
Andrea Guerrieri1, Gabriel Da Silva Marques2, Francesco Regazzoni3, Andres Upegui2
1EPFL and HES-SO, 2University of Applied Sciences Western Switzerland, 3University of Amsterdam and Universita della Svizzera Italiana

126    10:00AM
5B.4
A Novel Method Against Hardware Trojans in Approximate Circuits
Yuqin Dou1, CHONGYAN GU2, Chenghua Wang1, Weiqiang Liu1
1Nanjing University of Aeronautics and Astronautics, 2Queen's University Belfast

78    10:20AM
5B.5
Using Path Features for Hardware Trojan Detection Based on Machine Learning Techniques
Chia-Heng Yen1, Jung-Che Tsai1, Kai-Chiang Wu2
1National Yang Ming Chiao Tung University, 2Department of Computer Science, National Chiao Tung University


SESSION 5C

Friday April 7

Efficient Algorithm, Hardware, and Computing Paradigm for Machine Learning

Chair: Kang Jun Bai, AFRL

136    9:00AM
5C.1
Locality-sensing Fast Neural Network (LFNN): An Efficient Neural Network Acceleration Framework via Locality Sensing for Real-time Videos Queries
Xiaotian Ma, Jiaqi Tang, Yu Bai
California State University, Fullerton

113    9:20AM
5C.2
Image Quantization Tradeoffs in a YOLO-based FPGA Accelerator Framework
Richard Yarnell, Mousam Hossain, Ronald DeMara
University of Central Florida

111    9:40AM
5C.3
Automatic Subnetwork Search Through Dynamic Differentiable Neuron Pruning
Zigeng Wang1, Bingbing Li1, Xia Xiao1, Tianyun Zhang2, Mikhail Bragin1, Bing Yan3, Caiwen Ding1, Sanguthevar Rajasekaran1
1University of Connecticut, 2Cleveland State University, 3Rochester Institute of Technology

84    10:00AM
5C.4
A Novel Stochastic LSTM Model Inspired by Quantum Machine Learning
Joseph Lindsay and Ramtin Zand
University of South Carolina


SESSION 6A

Friday April 7

Design of Emerging Circuits & Systems

Chair: Rasit Topaloglu, IBM
Co-Chair: Ujwal Radhkrishna, Texas Instruments Inc.

16    10:45AM
6A.1
An Area Efficient Superconducting Unary CNN Accelerator
Patricia Gonzalez-Guerrero, George Michelogiannakis, Kylie Huch, Nirmalendu Patra, Thom Popovici
LBL

91    11:05AM
6A.2
A Novel Scalable Array Design for III-V Compound Semiconductor-based Non-volatile Memory (UltraRAM) with Separate Read-Write Paths
Shamiul Alam1, Kazi Asifuzzaman2, Ahmedullah Aziz3
1University of Tennessee Knoxville, 2Oak Ridge National Laboratory, 3University of Tennessee, Knoxville

172    11:25AM
6A.3
ZOCHEN: Compression using Zero chain elimination and encoding to improve endurance of Non-volatile Memories
Nishant Bharti1, Arijit Nath2, Swati Upadhyay1, Hemangee Kapoor3
1IIT Guwahati, 2IIT Guwahati, India, 3Indian Institute of Technology Guwahati

28    11:45AM
6A.4
A Polymorphic Electro-Optic Logic Gate for High-Speed Reconfigurable Computing Circuits
Venkata Sai Praneeth Karempudi, Sairam Sri Vatsavai, Ishan Thakkar, Todd Hastings
University of Kentucky


SESSION 6B

Friday April 7

Novel AI Computing

Chair: Hongyu An, Michgan Tech
Co-Chair: Haowen Fang, synopsys

87    10:45AM
6B.1
Spiking Domain Feature Extraction with Temporal Dynamic Learning
Honghao Zheng and Yang (Cindy) Yi
Virginia Tech

37    11:05AM
6B.2
Moving Towards Game-Changing Technology: Fabrication and Application of HfO2 RRAM for In-Memory Computing
Kang Jun Bai1, Daniel Titcombe2, Jack Lombardi1, Clare Thiem1, Nathaniel Cady2
1Air Force Research Laboratory, 2SUNY Polytechnic Institute

133    11:25AM
6B.3
Cache Register Sharing Structure for Channel-level Near-memory Processing in NAND Flash Memory
HyunWoo Kim1, Seungwon Baek1, Minyoung Jung2, Jaehong Song1, Hyodong Kim1, Junhyeon Kim1, Seongju Kim1, Taigon Song1, Jongbeom Kim1, Hyundong Lee3, Yunjeong Go3
1Kyungpook National University (KNU), 2Kyungpook National University (KNU),, 3Kyungpook National University

73    11:45AM
6B.4
Online Training from Streaming Data with Concept Drift on FPGAs
Esther Roorda and Steve Wilton
University of British Columbia


SESSION 6C

Friday April 7

Security for Resource-Limited Devices

Chair: Ava Hedayatipour, California State University, Long Beach

179    10:45AM
6C.1
Attacks on Continuous Chaos Communication and Remedies for Resource Limited Devices
Rahul Vishwakarma1, Ravi Monani2, Amin Rezaei2, Hossein Sayadi2, Mehrdad Aliasgari2, Ava Hedayatipour3
1California State University Long Beach, 2California State University, Long Beach, 3CSULB

178    11:05AM
6C.2
Split-Slope Chaotic Map Providing High Entropy Across Wide Range
Partha Sarathi Paul1, Maisha Sadia1, Anurag Dhungel1, Parker Hardy1, Md Sakib Hasan2
1Graduate Student, 2Assistant Professor

181    11:25AM
6C.3
Reconfigurable low-power Cryptographic processor based on LFSR for Trusted IoT platforms
Mohamed El-Hadedy1, Russell Hua2, Kazutomo Yoshii3, Wen-mei Hwu4, Martin Margala5
1CalPoly Pomona, 2California State Polytechnic University, Pomona, 3Argonne National Lab, 4University of Illinois at Urbana-Champaign, 5University of Louisiana at Lafayette

180    11:45AM
6C.4
Automating Hardware Trojan Detection Using Unsupervised Learning: A Case Study of FPGA
Jaya Dofe1, Shailesh Rajput2, Wafi Danesh3
1California State University, 2California State University Fullerton, 3University of Missouri, Kansas City