ISQED 2016: Program, Rev. 7


SESSION 1A

Tuesday March 15

Low Power Memory & Logic Design

Chair: Kurt Schwartz, Texas Instruments
Co-Chair: Charles Augustine, Intel

10:30AM
1A.1
Sizing-Priority Based Low-Power Embedded Memory for Mobile Video Applications
Seyed Alireza Pourbakhsh, Xiaowei Chen, Dongliang Chen, Xin Wang, Na Gong, Jinhui Wang
North Dakota State University

10:50AM
1A.2
Bit-Upset Vulnerability Factor for eDRAM Last Level Cache Immunity Analysis
Navid Khoshavi, Xunchao Chen, Jun Wang, Ronald F. DeMara
University of Central Florida

11:10AM
1A.3
Optimizing SRAM Bitcell Reliability and Energy for IoT Applications
Harsh Patel, Farah Yahya, Benton Calhoun
University of Virginia

11:30AM
1A.4
Variability- and Correlation-Aware Logical Effort for Near-Threshold Circuit Design
Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera
Kyoto University


SESSION 1B

Tuesday March 15

Advanced Three-Dimensional Integrated Circuits

Chair: Payman Zarkesh-Ha, University of New Mexico

10:30AM
1B.1
Design Challenges and Methodologies in 3D Integration for Neuromorphic Computing Systems
M. Amimul Ehsan1, Hongyu An1, Zhen Zhou2, Yang Yi1
1University of Kansas, 2Intel

10:50AM
1B.2
Optimization of Dynamic Power Consumption in Multi-Tier Gate-Level Monolithic 3D ICs
Sheng-En(David) Lin, Partha Pande, Dae Hyun Kim
Washington State University

11:10AM
1B.3
Electromigration-Aware Placement for 3D-ICs
Tiantao Lu1, Zhiyuan Yang2, Ankur Srivastava1
1ECE Department, University of Maryland, 2University of Maryland, College Park

11:30AM
1B.4
Monolithic 3D IC Design: Power, Performance, and Area Impact at 7nm
Kartik Acharya1, Kyungwook Chang1, Bon Woong Ku1, Shreepad Panth1, Saurabh Sinha2, Brian Cline2, Greg Yeric2, Sung Kyu Lim3
1Georgia Institute of Technology, 2ARM Inc, 3Georgia Tech


SESSION 1C

Tuesday March 15

Technology beyond CMOS

Chair: Brian Cline, ARM
Co-Chair: Rajan Beera, Pall Corporation

10:30AM
1C.1
Nanodevices to Nanosystems: Carbon Nanotube Digital VLSI
Gage Hills1, Max Shulaker2, Chi-Shuen Lee2, H.-S. Philip Wong2, Subhasish Mitra2
1Department of Electrical Engineering, Stanford University, 2Stanford University

10:50AM
1C.2
Negative Capacitance for Low Power Computing
Asif Khan and S Salahuddin
University of California, Berkeley

11:10AM
1C.3
Tunnel-FET: The Prospects and Challenges Ahead
Uygar Avci, Daniel Morris, Ian Young
Intel

11:30AM
1C.4
Beyond Moore’s Law: It's More than Just Transistors
Saurabh Sinha, Greg Yeric, Lucian Shifren, Brian Cline
ARM Inc.


SESSION 2A

Tuesday March 15

Network on a Chip

Chair: Hai (Helen) Li, University of Pittsburgh
Co-Chair: Rajesh Berigei, Texas Instruments

2:00PM
2A.1
Maximizing the Performance of NoC-based MPSoCs under Total Power and Power Density Constraints
Alireza Shafaei Bejestan1, Yanzhi Wang1, Lizhong Chen2, Shuang Chen1, Massoud Pedram3
1University of Southern California, 2Oregon State University, 3USC

2:20PM
2A.2
Process Variation Aware Crosstalk Mitigation for DWDM based Photonic NoC Architectures
SAI VINEEL REDDY CHITTAMURU, Ishan Thakkar, Sudeep Pasricha
Colorado State University

2:40PM
2A.3
Memory-Aware Circuit Overlay NoCs for Latency Optimized GPGPU Architectures
Venkata Yaswanth Raparti1 and Sudeep Pasricha2
1Colorado State University, Fort Collins, 2Colorado State University

3:00PM
2A.4
Design Guidelines for Embedded NoCs on FPGAs
Noha Gamal1, Hossam Fahmy2, Yehea Ismail3, Hassan Mostafa2
1Mentor Graphics, 2Cairo University, 3CND at Zewail city and AUC

3:20PM
2A.5
A Delay Variation and Floorplan Aware High-level Synthesis Algorithm with Body Biasing
Koki Igawa, Youhua Shi, Masao Yanagisawa, Nozomu Togawa
Waseda University


SESSION 2B

Tuesday March 15

IoT Design Concepts

Chair: Stephan Heinrich-Barnes, Texas Instruments
Co-Chair: Charles Augustine, Intel

2:00PM
2B.1
IoT Memory Trends
Rashmi Sachan
Texas Instruments

2:20PM
2B.2
NVM Memory Requirements for a Secure IoT Ecosystem
Jim Lipman
Sidense Corp

2:40PM
2B.3
Challenges and Trends in Switched Capacitor Power Converters in an IoT World
Mervin John and Yogesh Ramadass
Texas Instruments

3:00PM
2B.4
Embedded Integrated Microdevices for the Internet of Things
Mark Bachman
University of California, Irvine

3:20PM
2B.5
Designing for Security in SoC-driven Supply Chains
Tom Katsioulas
Mentor Graphics


SESSION 2C

Tuesday March 15

Circuits and Architecture for Emerging Logic and Memory Technologies

Chair: Paul Tong, Pericom Semiconductor
Co-Chair: Swaroop Ghosh, University of South Florida

2:00PM
2C.1
Exploring the Use of Volatile STT-RAM for Energy Efficient Video Processing
Hengyu Zhao1, Hongbin Sun1, Qiang Yang2, Tai Min1, Nanning Zheng1
1Xi'an Jiaotong University, 2Changhong Electric Co., Ltd

2:20PM
2C.2
Low Power Data-Aware STT-RAM based Hybrid Cache Architecture
Mohsen Imani1, Shruti Patil1, Tajana Rosing2
1University of California San Diego, 2UCSD

2:40PM
2C.3
Yield estimation and statistical design of memristor cross-point memory systems
Jizhe Zhang1 and Sandeep Gupta2
1Electrical Engineering Department, University of Southern California, 2University of Southern California (USC)

3:00PM
2C.4
ReMAM: Low Energy Resistive Multi-Stage Associative Memory for Energy Efficient Computing
Mohsen Imani1, Pietro Mercati2, Tajana Rosing2
1University of California San Diego, 2UCSD

3:20PM
2C.5
Ultra-Low-Power Compact TFET Flip-Flop Design for High-Performance Low-Voltage Applications
Navneet Gupta1, Adam Makosiej2, Andrei Vladimirescu3, Amara Amara3, Costin Anghel3
1Institut supérieur d'électronique de Paris, France; LETI, Commissariat à l’Energie Atomique et aux Energies Alternatives (CEA-LETI) France;, 2CEA-LETI, France, 3Institut supérieur d'électronique de Paris, France


SESSION T12

Tuesday March 15

Tutorial 1 & 2

Chair: Hai (Helen) Li, University of Pittsburgh
Co-Chair: Vinod Viswanth, Real Intent

4:00PM-4:50PM
T1
On-chip Nonvolatile Memory Designs for energy-efficient IoT
Meng-Fan (Marvin) Chang
National Tsing Hua University

4:50PM-5:40PM
T2
Pattern Recognition and Learning with Neuromorphic Cognitive Systems
Giacomo Indiveri
University of Zurich


SESSION 3A

Tuesday March 15

On-Chip Machine Learning and Neuromorphic Computing

Chair: Rouwaida Kanj, American University of Beirut

4:00PM
3A.1
Sparsely Connected Neural Networks in FPGA for Handwritten Digit Recognition
Luca Saldanha and C Bobda
University of Arkansas

4:20PM
3A.2
Neuromorphic architectures with electronic synapses
S Burc Eryilmaz1, Siddharth Joshi2, Emre Neftci3, Weier Wan1, Gert Cauwenberghs2, H.-S. Wong1
1Stanford University, 2University of California, San Diego, 3Department of Cognitive Sciences, University of California Irvine

4:40PM
3A.3
Towards a Scalable Neuromorphic Hardware for Classification and Prediction with Stochastic No-Prop Algorithms
Dan Christiani, Cory Merkel, Dhireesha Kudithipudi
Rochester Institute of Technology

5:00PM
3A.4
High-Performance and Low-Power MPSoC Architectures for Advanced Mobile and Wearable IoT Systems
Lech Jozwiak
Eindhoven University of Technology


SESSION P

Tuesday March 15

Posters

Chair: Brian Cline, ARM
Co-Chair: Kamesh Gadepally, GigaCom Semiconductor

5:40PM
P1
Equivalence Checking between SLM and RTL Using Machine Learning Techniques
Jian Hu1, Tun Li2, Sikun Li2
1National University of Defense Technology, College of Computer, 2National University of Defense Technology, School of Computer

5:40PM
P2
Very Low supply Voltage Room Temperature Test to screen low temperature soft blown fuse fails which result in a resistive bridges
Peter Sarson
ams AG

5:40PM
P3
On-Line Harmonic-Aware Partitioned Scheduling For Real-Time Multi-Core Systems Under RMS
Ming Fan1, Rong Rong2, Xinwei Niu3
1Broadcom Corporation, 2Florida International University, 3Penn State Erie, The Behrend College

5:40PM
P4
CovGen: A Framework for Automatic Extraction of Functional Coverage Models
Eman El Mandouh1 and Amr G. Wassal2
1Mentor Graphics Corporate, 2Computer Engineering Dept, Cairo University

5:40PM
P5
In-situ Trojan Authentication for Invalidating Hardware-Trojan Functions
Masaru Oya, Youhua Shi, Masao Yanagisawa, Nozomu Togawa
Waseda University

5:40PM
P6
A 1.3μW, 5pJ/cycle sub-threshold MSP430 processor in 90nm xLP FDSOI for energy-efficient IoT applications
Abhishek Roy1, Peter Grossmann2, Steven Vitale2, Benton Calhoun3
1University of Virginia, 2MIT Lincoln Laboratory, Lexington, MA USA, 3University of Virginia, Charlottesville, VA USA

5:40PM
P7
Statistical Quality Modeling of Approximate Hardware
Seogoo Lee1, Dongwook Lee2, Kyungtae Han3, Emily Shriver3, Lizy John2, Andreas Gerstlauer2
1The Univeristy of Texas at Austin, 2The University of Texas at Austin, 3Intel Corporation

5:40PM
P8
Performance Evaluation of Stacked Gate-All-Around MOSFETs at 7 and 10 nm Technology Nodes
Meng-Yen Wu and Meng-Hsueh Chiang
National Cheng Kung University

5:40PM
P9
Fast Stress Analysis for Runtime Reliability Enhancement of 3D IC Using Artificial Neural Network
Lang Zhang1, Hai Wang1, Sheldon Tan2
1University of Electronic Science and Technology of China, 2University of California at Riverside

5:40PM
P10
Detection of Malicious Hardware Components in Mobile Platforms
Fatih Karabacak1, Umit Ogras1, Sule Ozev2
1Arizona State University, 2ASU

5:40PM
P11
An Effective BIST Architecture for Power-Gating Mechanisms in Low-Power SRAMs
Alberto Bosio1, Luigi Dilillo1, Patrick Girard1, Arnaud Virazel1, Leonardo Zordan2
1LIRMM, 2Intel Mobile Communication

5:40PM
P12
Performance Evaluation Considering Mask Misalignment in Multiple Patterning Decomposition
Haitong Tian and Martin Wong
University of Illinois at Urbana Champaign

5:40PM
P13
UM-BUS: An Online Fault-Tolerant Bus for Embedded Systems
Jiqin Zhou1, Weigong Zhang2, Keni Qiu2, Xiaoyan Zhu2
1Beijing Center for Mathematics and Information Interdisciplinary Sciences, 2College of Information Engineering, Capital Normal University

5:40PM
P14
Low-Leakage and Process-Variation-Tolerant Write-Read Disturb-Free 9T SRAM Cell Using CMOS and FinFETs
Ayushparth Sharma and Kusum Lata
The LNM Institute of Information Technology

5:40PM
P15
Ruggedness evaluation and design improvement of automotive power MOSFETs
Tianhong Ye and Kuan Chee
The University of Nottingham Ningbo China

5:40PM
P16
Device/System Performance Modeling of Stacked Lateral NWFET Logic
Victor Huang1, Chenyun Pan1, Azad Naeemi1, Dmitry Yakimets2, Praveen Raghavan2
1Georgia Institute of Technology, 2imec

5:40PM
P17
Accelerating Physical Level Sub-Component Power Simulation by Online Power Partitioning
Siddharth S. Bhargav, Andrew Kolb, Young H. Cho
University of Southern California

5:40PM
P18
Power Efficient Router Architecture for Wireless Network-on-Chip
Hemanta Kumar Mondal1, Sri Harsha Gade2, Raghav Kishore1, Shashwat Kaushik1, Sujay Deb1
1IIIT Delhi, 2iiitd.ac.in

5:40PM
P19
Preventing Integrated Circuit Piracy via Custom Encoding of Hardware Instruction Set
Vinay Patil1, Arunkumar Vijayakumar2, Sandip Kundu1
1Department of Electrical and Computer Engineering, University of Massachusetts Amherst, 2Department of Electrical and Computer Engineering, University of Massachusetts, Amherst

5:40PM
P20
Preventing Design Reverse Engineering with Recon gurable Spin Transfer Torque LUT Gates
Ted Winograd1, Hassan Salmani2, Hamid Mahmoodi3, Houman Homayoun1
1George Mason University, 2Howard University, 3San Francisco State University

5:40PM
P21
Portable Bio-sensor for Chronic Malaria Detection
Lalitha Sivaraj, nurul amziah md yunus, Mohamad Nazim Mohtar, samsuzana abd aziz, M iqbal saripan, Fakhrul Zaman Rokhani, Zurina Zainal Abidin
University Putra Malaysia

5:40PM
P22
Performance Modeling and Optimization for On-Chip Interconnects in 3D Memory Arrays
Javaneh Mohseni, Chenyun Pan, Azad Naeemi
Georgia Institute of Technology

5:40PM
P23
Near-threshold circuit variability in 14nm FinFETs for ultra-low power applications
Sriram Balasubramanian, Ninad Pimparkar, Mangesh Kushare, Vinayak Mahajan, Juhi Bansal, Takashi Shimizu, Vivek Joshi, Kun Qian, Arunima Dasgupta, Karthik Chandrasekaran, Chad Weintraub, Ali Icel
GLOBALFOUNDRIES

5:40PM
P24
An Efficient Timing Analysis Model for 6T FinFET SRAM using Current-Based Method
Tiansong Cui1, Ji Li1, Alireza Shafaei Bejestan1, Shahin Nazarian1, Massoud Pedram2
1University of Southern California, 2USC


SESSION 4A

Wednesday March 16

Powering IoT

Chair: Stephen Hienrich-Barnes, Texas Instruments
Co-Chair: Charles Augustine, Intel

08:30AM
4A.1
Energy Harvesting and Power Management Opportunities in IOT
Harish Krishnamurthy, Jason Mix, Lilly Huang, Krishnan Ravichandran
Intel

08:50AM
4A.2
Linear, Point-of-Load Regulators for Fine-Grained Power Management of Digital Circuits
Saad Bin Nasir, Samantak Gangopadhyay, Arijit Raychowdhury
Georgia Institute of Technology

09:10AM
4A.3
Multi-Ratio Switched-Capacitor DC-DC Converters for Power Management Applications
Patrick Mercier and Loai Salem
University of California, San Diego

09:30AM
4A.4
Low-Power Circuit Techniques for IoT Energy Harvesting
Inhee Lee, Wanyeong Jung, Dennis Sylvester, David Blaauw
University of Michigan


SESSION 4B

Wednesday March 16

Enabling 5nm Technology Node

Chair: Brian Cline, ARM
Co-Chair: Rajan Beera, Pall Corporation

08:30AM
4B.1
Nanowire Transistor Solutions for 5nm and Beyond
Asen Asenov1, Y Wang2, B Cheng1, X Wang3, P Asenov1, T Al-Ameri3, V. P. Georgiev3
1Gold Standard Simulations, 2Peking University, Beijing, 3University of Glasgow

08:50AM
4B.2
5nm: Has the Time for a Device Change Come?
Praveen Raghavan, Marie Garcia Bardon, Pieter Schuddinck, Doyoung Jang, Dmitry Yakimets, Rogier Baert, Peter Debacker, Diederik Verkest, Aaron Thean
imec

09:10AM
4B.3
Transistor Design for 5nm and Beyond: Slowing Down Electrons to Speed Up Transistors
Victor Moroz1, Joanne Huang1, Reza Arghavani2
1Synopsys, 2Lam Research

09:30AM
4B.4
Decomposition Technologies for Advanced Nodes
Fedor Pikus
Mentor Graphics, Inc


SESSION 4C

Wednesday March 16

Advanced Testing Concepts

Chair: Vinod Viswanath, Real Intent
Co-Chair: Sreejit Chakravarty, Intel

08:30AM
4C.1
Low Capture Power Dictionary based Test Data Compression
Panagiotis Sismanoglou and Dimitris Nikolos
University of Patras

08:50AM
4C.2
Analysis of Setup & Hold Margins Inside Silicon for Advanced Technology Nodes
Deepak Kumar Arora1, Darayus Adil Patel2, Shahabuddin Qureshi1, Sanjay Kumar1, Navin Kumar Dayani1, Balwant Singh1, Sylvie Naudet1, Arnaud Virazel3, Alberto Bosio3
1STMicroelectronics, 2STMicroelectronics / LIRMM, 3LIRMM

09:10AM
4C.3
Protocol-Guided Analysis of Post-silicon Traces Under Limited Observability
Hao Zheng1, Yuting Cao1, Sandip Ray2, Jin Yang2
1University of South Florida, 2Intel

09:30AM
4C.4
Nonlinear Delay-Table Approach for Full-Chip NBTI Degradation Prediction
Song Bian, Michihiro Shintani, Shumpei Morita, Masayuki Hiromoto, Takashi Sato
Kyoto University


SESSION T34

Wednesday March 16

Tutorial 3 & 4

Chair: Hai (Helen) Li, University of Pittsburgh
Co-Chair: Vinod Viswanth, Real Intent

10:10AM-11:00AM
T3
Low Power SoC System Design – A Systems Approach to Power Management Techniques, Power and Performance Optimizations, Thermal and Energy Management of Systems-on-Chip
Rajiv Muralidhar
Intel

11:00AM-11:50AM
T4
Building neuromorphic computing systems with emerging device technologies
John Strachan
Hewlett Packard Laboratories


SESSION 5A

Wednesday March 16

Embedded Systems

Chair: Yang Yi, University of Kansas
Co-Chair: Rajesh Berigei, Texas Instruments

1:00PM
5A.1
Reliability and Energy-aware Cache Reconfiguration for Embedded Systems
Yuanwen Huang and Prabhat Mishra
University of Florida

1:20PM
5A.2
Architecting STT Last-Level-Cache for Performance and Energy Improvement
Fazal Hameed1 and Mehdi Tahoori2
1Chair of Dependable Nano Computing KIT - Karlsruhe Institute of Technology, 2Karlsruhe Institute of Technology

1:40PM
5A.3
Instruction Cache Aging Mitigation Through Instruction Set Encoding
Anteneh Gebregiorgis1, Fabian Oboril1, Mehdi B. Tahoori1, Said Hamdioui2
1Karlsruhe Institute of Technology, 2Delft University of Technology

2:00PM
5A.4
Harvesting-aware Adaptive Energy Management in Solar-Powered Embedded Systems
Nga Dang1, Zana Ghaderi2, Eli Bozorgzadeh3, Moonju Park4
1Google Inc., 2University of California, Irvine, 3Univ. of California, Irvine, 4Incheon National University, South Korea

2:20PM
5A.5
Negotiation-Based Resource Provisioning and Task Scheduling Algorithm for Cloud Systems
Ji Li1, Yanzhi Wang2, Xue Lin1, Shahin Nazarian1, Massoud Pedram3
1University of Southern California, 2Syracuse University, 3USC


SESSION 5B

Wednesday March 16

Hardware and System Security

Chair: Gang Qu, Univeristy of Maryland

1:00PM
5B.1
Digital IP Protection Using Threshold Voltage Control
Joseph Davis, Niranjan Kulkarni, Jinghua Yang, Aykut Dengi, Sarma Vrudhula
Arizona State University

1:20PM
5B.2
Trojan Detection in Digital Systems Using Current Sensing of Pulse Propagation in Logic Gates
Sabyasachi Deyati1, Abhijit Chatterjee2, Barry Muldrey1
1Georgia Institute of Technology, 2Georgia Tech

1:40PM
5B.3
Active Protection against PCB Physical Tampering
Steven Paley1, Tamzidul Hoque2, Swarup Bhunia2
1Case Western Reserve University, 2University of Florida

2:00PM
5B.4
SVM-based Real-Time Hardware Trojan Detection for Many-Core Platform
Amey Kulkarni1, Youngok Pino2, Tinoosh Mohsenin1
1University of Maryland, Baltimore County, 2Information Sciences Institute , University of Southern California

2:20PM
5B.5
On Testing Physically Unclonable Functions for Uniqueness
Arunkumar Vijayakumar1, Vinay Patil2, Sandip Kundu1
1Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, 2Department of Electrical and Computer Engineering, University of Massachusetts Amherst


SESSION 5C

Wednesday March 16

Analog Design

Chair: Riaz Naseer, Intel
Co-Chair: Stephan Heinrich-Barnes, Texas Instruments

1:00PM
5C.1
Neuromorphic Computing with Resistive Synaptic Arrays: Devices, Circuits and Systems
Yu Cao1, Shimeng Yu1, Yu Wang2, Pai-Yu Chen1, Lixue Xia2, Huazhong Yang2
1Arizona State University, 2Tsinghua University

1:20PM
5C.2
Dot-Product Engine as Computing Memory to Accelerate Machine Learning Algorithms
Miao Hu, John Paul Strachan, Zhiyong Li, R. Stanley Williams
Hewlett Packard Labs

1:40PM
5C.3
0.5-V 50-mV-Swing 1.2-GHz 28-nm-FD-SOI 32-bit Dynamic Bus Architecture with Dummy Bus
Khaja Ahmad Shaik, Kiyoo Itoh, Amara Amara
Institut supérieur d'électronique de Paris (ISEP)

2:00PM
5C.4
Analysis and Design of a Triangular Active Charge Injection for Stabilizing Resonant Power Supply Noise
Masahiro Kano, Toru Nakura, Kunihiro Asada
The University of Tokyo

2:20PM
5C.5
An Ultra-fast and Low-power Design of Analog Circuit Network for DoG Pyramid Construction of SIFT Algorithm
Zheyu Liu, Fei Qiao, Qi Wei, Xinghua Yang, Yi Li, Huazhong Yang
Dept.of Electronic Engineering, Tsinghua University


SESSION 6A

Wednesday March 16

Design Optimization for Performance, Reliability, and Yield

Chair: Fedor Pikus, Mentor Graphics
Co-Chair: Vivek Joshi, GlobalFoundries

3:00PM
6A.1
Impact of Interconnect Variability on Circuit Performance in Advanced Technology Nodes
Divya Madapusi Srinivas Prasad, Chenyun Pan, Azad Naeemi
Georgia Institute of Technology

3:20PM
6A.2
Hotspot Detection using Machine Learning
Kareem Madkour1, Sarah Mohamed1, Dina Tantawy2, Mohab Anis3
1Mentor Graphics, 2Cairo Univeristy, 3American University in Cairo

3:40PM
6A.3
Efficient Analog Circuit Optimization Using Sparse Regression and Error Margining
Mohamed Baker Alawieh1, Fa Wang2, Rouwaida Kanj1, Xin Li2, Rajiv Joshi3
1American University of Beirut, 2Carnegie Mellon University, 3IBM

4:00PM
6A.4
State Encoding based NBTI Optimization in Finite State Machines
Shilpa Pendyala and Srinivas Katkoori
University of South Florida Tampa


SESSION 6B

Wednesday March 16

EDA for Design Exploration & Analysis Beyond Moore's Law

Chair: Takashi Sato, Kyoto University
Co-Chair: Ofelya Manukyan, Synopsys

3:00PM
6B.1
Gate Movement for Timing Improvement on Row Based Dual-VDD Designs
Hua Xiang, Lakshmi Reddy, Haifeng Qian, Ching Zhou, Yu-Shiang Lin, Fanchieh Yee, Andrew Sullivan, Pong-Fei Lu
IBM Research

3:20PM
6B.2
Multiple Shift-vector Importance Sampling Method using Support Vector Machine and Clustering for High-Density DRAM Designs
Jinyoung Lee, Sunghee Yun, Jeongha Kim, Dongsoo Kang, Jeongyeol Kim, Sanghoon Lee
Samsung Electronics

3:40PM
6B.3
Fully Automated PLL Compiler Generating Final GDS from Specification
Toru Nakura and Kunihiro Asada
The University of Tokyo

4:00PM
6B.4
AFD-Based Method for Signal Line EM Reliability Evaluation
Zhong Guan1 and Malgorzata Marek-Sadowska2
1UC Santa Barbara, ECE department, 2University of California, Santa Barbara


SESSION 6C

Wednesday March 16

Sensors for IOT

Chair: Kamesh Gadepally, GigaCom Semiconductor
Co-Chair: Charles Augustine, Intel

3:00PM
6C.1
A Smart ECG Sensor with In-Situ Adaptive Motion-Artifact Compensation for Dry-Contact Wearable Healthcare Devices
Shuang Zhu, Jingyi Song, Balaji Chellappa, Ali Enteshari, Tuo Shan, Mengxun He, Yun Chiu
University of Texas at Dallas

3:20PM
6C.2
Making Unreliable Chem-FET Sensors Smart via Soft Calibration
Fatih Karabacak1, Uwadiae Obahiagbon1, Umit Ogras1, Sule Ozev2, Jennifer Blain Christen1
1Arizona State University, 2ASU

3:40PM
6C.3
Novel design of a silicon photodetector and its integration in a 4×4 CMOS pixel array
Hari Shanker Gupta1, Satyajit Mohapatra2, Nihar R. Mohapatra2, D K Sharma3
1Space Applications Centre, 2Department of Electrical Engineering, Indian Institute of Technology, Gandhinagar, Ahmedabad, India, 3Department of Electrical Engineering, Indian Institute of Technology, Bombay, Mumbai, India

4:00PM
6C.4
Time-Division Multiple Access Based Intra-body Communication for Wearable Health Tracker
Tan Chee Phang1, Mohammad Harris Mokhtar2, Mohd Nazim Mohtar1, fakhrul zaman rokhani1
1University Putra Malaysia, 2Telecom Research