This paper presents a rigorous step towards design-for-assurance by introducing a new class of logically reconfigurable design resilient to design reverse engineering. Based on the Spin Transfer Torque (STT) Magnetic technology, we introduce a basic set of Look-Up-Tables(LUTs) logic components (STT-based LUTs). In the following, we propose several algorithms to select and replace custom CMOS gates with reconfigurable STT-based LUTs during design implementation such that that the functionality of STT-based components cannot be determined in any manageable time, rendering any design reverse engineering attack ineffective. The selection algorithms also ensure that there is minimum or no impact on design parametric constraints including performance, power and area.