ISQED 2003

PDF VERSION OF THE PROGRAM


CONFERENCE AT A GLANCE

Date Time Room 1 Room 2 Room 3 Room 4
Monday 3/24/03 9:00am-4:45pm Tutorial Track A

Room:
Monterey
Tutorial Track B

Room:
Carmel
Tutorial Track C

Room:
Santa Clara
Tutorial Track D

Room:
San Jose

Tutorials/Workshops are sponsored by Numerical Technologies

6:30pm-8:30pm Evening Panel Discussion EP1 & Dinner
Sponsored by Ammocore

Is Quality a Design Constraint for Sub 100nm Designs?

Room: Siskiyou

Tuesday 3/25/03 8:30am-10:15pm PLENARY SESSION I

ISQED Best Paper Awards
Followed by
Keynote Speeches:

Bob Payne, Susumu Kohyama, Ted Vucurevich 

Room: Donner Pass

10:15am-10:30am Morning Break
Sponsored by Magma Design
10:30am-12:00pm Session 1A

Reliability and Design in Deep Submicron Technologies

Room: Monterey/Carmel
Session 1B

Reducing Leakage Currents in VLSI Circuits

Room: San Jose/Santa Clara
Session 1C

SOC Methodology


Room: San Carlos/San Juan

Speaker Practice

Room: Riesling

12:00pm-1:00pm ISQED LUNCHEON

Sponsored by Synopsys

Room: Siskiyou

1:00pm-3:05pm Session 2A

Testing of SOCs

Room: Monterey/Carmel
Session 2B

Design for Manufacturability & Quality

Room: San Jose/Santa Clara
Session 2C

Design Considerations in Advanced Technologies


Room: San Carlos/San Juan

Speaker Practice

Room: Riesling
3:05pm-3:30pm Afternoon Break
Sponsored by Magma Design
3:30pm-5:30pm Session 3A

Interconnect & Substrate Noise

Room: Monterey/Carmel
Session 3B

Impact of New Standards for Design Data Modeling & Manufacturing Interface

Room: San Jose/Santa Clara
Session 3C

Package-Design Interface Challenges

Room: San Carlos/San Juan
Speaker Practice

Room: Riesling

 

6:30pm-8:30pm Evening Panel Discussion EP2
Sponsored by Advanced Packaging/Penn Well

IC & Package Co-Design; Challenge or Dream?  

Room: Siskiyou

Wednesday 3/26/03 8:30am-10:15am PLENARY SESSION II

Keynote speeches by:

Rajeev Madhavan, Michael Reinhardt, Shekhar Borkar

Room: Donner Pass

10:15am-10:30am Morning Break
Sponsored by Magma Design
10:30am-12:00pm SESSION 4A

Power Analysis and Low Power Design

Room: Monterey/Carmel
SESSION 4B

Topics in Design & Interconnect Modeling

Room: San Jose/Santa Clara
SESSION 4C

Techniques for High Speed Circuit and Module Generation

Room: San Carlos/San Juan
Speaker Practice

Room: Riesling
12:00pm-1:00pm LUNCH BREAK
1:00pm-3:05pm SESSION 5A

Timing and Noise Issues in Physical Design

Room: Monterey/Carmel
SESSION 5B

Reliability Analysis

Room: San Jose/Santa Clara
SESSION 5C

Embedded Panel Discussion
Sponsored By Synopsys

Hidden Quality, Grouching Customer - How much Does the Quality of EDA Tools Impact Electronic Design?

Room: San Carlos/San Juan

Speaker Practice

Room: Riesling
3:05pm-3:30pm

 Afternoon Break
Sponsored by Magma Design

3:30pm-5:30pm SESSION 6A

Interconnect Parasitic Effects


Room: Monterey/Carmel

SESSION 6B

Design & Measurement Issues in Testing


Room: San Jose/Santa Clara

  Speaker Practice

Room: Riesling

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International Symposium on Quality of Electronic Design
Copyright 1998-2002 ISQED. All rights reserved.
Revised: March 24, 2003 .