The relentless drive for advanced technologies, fueled by the demands of AI and safety-critical applications, has intensified the focus on transistor aging—a pivotal concern that undermines both transistor reliability and overall circuit performance. This issue is further exacerbated by advancements in packaging and 3D integration, where elevated operating temperatures accelerate aging mechanisms. As technology nodes scales below 3 nm, transistor self-heating emerges as a fundamental challenge, driven by the thermal constraints of 3D confined structures. Traditional physics-based simulation tools, such as Technology CAD (TCAD), struggle to meet the growing computational demands of these intricate designs, with escalating simulation times that impede comprehensive design exploration and optimization. Here, we present a novel framework leveraging machine learning (ML) to accelerate transistor and circuit reliability analysis. These ML-driven methodologies achieve accurate predictions of self-heating and aging effects, enabling rapid identification of aging-prone transistors while drastically reducing computational overhead. Furthermore, by obviating the need to share proprietary, physics-based models from semiconductor foundries, these techniques preserve data confidentiality, addressing critical industry concerns. Such approach not only enhances the scalability of reliability assessments but also offers a transformative pathway for tackling the multifaceted challenges of next-generation semiconductor technologies.