Swarm - A VLSI Timing, Fanout-aware Clustering Algorithm

Christos Sotiriou1, George Goudroumanis1, Nikolaos Sketopoulos1, Christos Georgakidis2
1Univesity of Thessaly - Department of Electrical and Computer Engineering (EECE), 2University of Thessaly


n this work, we present Swarm, a novel, multi-level, timing and fanout aware, clustering algorithm targeted towards standard-cell netlist graphs. Its output provides a divide-and-conquer framework for EDA Physical Design algorithms such as placement or partitioning. Swarm produces a hierarchy of area-balanced clusters at multiple levels. At each level of clustering, the number of objects as well as connectivity is reduced. The fragmentation of critical paths and large fanout nets across multiple clusters is minimised by the algorithm's operation, by exploiting the net slack and fanout values, during the cluster growth process. We compare the Quality of Results (QoR) of Swarm against (i) the well-known hMETIS VLSI multi-level clustering, partitioning algorithm [1], [2], and (ii) against a learning based clustering flow, using graph node embeddings, implemented by the combination of the node2vec [3] method and a fast k-means [4] algorithm. Results on eight benchmark designs indicate that Swarm achieves sparser connectivity, with minimum critical path and large fanout net fragmentation across clusters, compared to the other two approaches. Thus, Swarm provides an excellent divide-and-conquer clustering framework, advantageous for timing-driven operations during placement or partitioning