DECOR: Enhancing Logic Locking Against Machine Learning-Based Attacks

Yinghua Hu1, Kaixin Yang2, Subhajit Dutta Chowdhury2, Pierluigi Nuzzo2
1Synopsys, 2University of Southern California


Logic locking (LL) has gained attention as a promising intellectual property protection measure for integrated circuits. However, recent attacks, facilitated by machine learning (ML), have shown the potential to predict the correct key in multiple LL schemes by exploiting the correlation of the correct key value with the circuit structure. This paper presents a generic LL enhancement method based on a randomized algorithm that can significantly decrease the correlation between locked circuit netlist and correct key values in an LL scheme. Numerical results show that the proposed method can efficiently degrade the accuracy of state-of-the-art ML-based attacks down to around 50%, resulting in negligible advantage versus random guessing.