With the reduction in transistor size, the radiation-induced soft error phenomenon in electronic circuits has become a significant reliability concern. In newer technologies, a high energy particle strike can affect multiple cells resulting in Single Event Multiple Transients (SEMTs). For an event affecting n cells horizontally, the SEMT pattern will be aliased as SEMTn. In this paper, we present a framework to estimate the SEMT vulnerability of the LEON3 processor by using Satisfiability Modulo Theories. This framework considers layout-based cell adjacency as error sites and includes the Electrical, Logical masking factors while estimating the vulnerability. The results indicate an overall average SEMT fault propagation probabilities of 30\% and 54\% due to the effects of SEMT3 and SEMT4, respectively. The total time to analyze the fault effects following our methodology is approximate 8.5 hours for the LEON3 ASIC Core on a server with 160 x Intel(R) Xeon(R) 10-core E7-8870 CPU running at 2.40GHz and with 1 TB of Main Memory.