Characterization of mitigation schemes against timing-based side-channel attacks on PCIe hardware

Usman Ali, Salman Abdul Khaliq, Omer Khan
University of Connecticut


PCI-e connected peripheral devices are prevalent in distributed embedded systems. Peripheral devices, such as a GPU connected to a host CPU via PCIe hardware brings massive performance gains for artificial intelligence applications. However, sharing the network hardware resources bring security challenges. The literature shows that timing side-channel attacks on shared PCI-e hardware leak security critical information and covert communication. These attacks are mitigated with performance implications at the algorithm, system, and hardware levels. This paper uses information theory concept of differential signaling and demonstrates that noise injection (a systemlevel mitigation scheme) is inadequate for practical purposes, and software or hardware level mitigation is required. Oblivious algorithm (at software level) and time-division multiplexing (TDM at hardware level) mitigations strategies are evaluated using a machine learning workload. Our evaluation shows that at varying level of load at the PCI-e, the oblivious algorithms always perform worse than hardware-based TDM.