FPGA based Reservoir computing with optimized reservoir node architecture

Chunxiao Lin, Yibin Liang, Yang (Cindy) Yi
Virginia Tech


Abstract

Updating the state of reservoir nodes is one of the essential parts of reservoir computing, which highly affects the performance of the system. In an Echo State Network (one of the primary models of reservoir computing), the process of state renewal can be divided into two stages, multiplication of the weight matrix and the input-state vector and the application of a non-linear activation function on the sum of products. The weight matrix in the multiplication is large, fixed, and sparse, providing the space for optimizing the internal bit multiplications with zero. The cost and hardware utilization also vary depending on different choices on the activation function. In this paper, we adopt the bit-serial matrix multiplier and direct spatial implementation of the fixed matrix to fully exploit the spareness property. The canonical signed digit representation is also employed for further logic optimization of the multiplier. As for the activation function, we choose a piece-wise linear function activation for the cost reduction, with the accuracy of the neural network matching our target standard.