Investigation on Realistic Stuck-on/off Defects to Complement IEEE P2427 Draft Standard

SADIA AZAM1, Nicola Dall'Ora2, Enrico Fraccaroli3, André Alberts4, Renaud Gillon5, Franco Fummi6
1University of Verona ,italy, 2University of Verona, 3Università degli Studi di Verona, 4Sydelity B.V., Kruisem, Belgium, 5Sydelity B.V., Kruisem, Belgium, 6Universita' di Verona


Historically, the concept of stuck-at fault did not originate from physical observations but rather to model faults at the gate level. Standard stuck-at fault models may not apply well on analog circuits because even a slight variation inside those circuits could create deviations of different magnitudes. That means that standard stuck-at faults would not be general enough for analog behavior. Recent work has proposed a technique for modeling oxide defects, less abstract concerning the digital stuck-at fault.

This paper focuses on evaluating faults proposed by the IEEE P2427 standard, which is still a work-in-progress standard. Moreover, a novel approach for modeling realistic stuck-at faults based on oxide defects is presented. We investigate the impact of these faults on the circuit on two designs taken from the IEEE analog-benchmarks circuit collection: an operational amplifier and a comparator model. We apply a novel method relying on AC matrices extracted at several operating points and combine it with a circle-fitting technique in order to extend the comparison to faults with uncertain parameters.