Hardware Trojan Detection Method for Inspecting Integrated Circuits Based on Machine Learning

Yuze Wang1, Peng Liu1, Xiaoxia Han1, Yingtao Jiang2
1Zhejiang University, 2University of Nevada Las Vegas


In integrated circuit design phase, malicious vendors can easily insert hardware Trojans into real-world chips because numbers of designers and suppliers participate into the chip design and manufacturing process. It is strongly required to develop hardware-Trojan detection methods especially for the chip circuits. As the peculiarity of Trigger nets in Trojan circuits, in this paper, we propose a Trigger-net-based gate-level hardware Trojans detection method and model for inspecting chip circuits. We extract the Trigger-net features for each net from known netlists and use the machine learning method to train multiple detection models according to the trigger modes. The detection models are used to identify suspicious Trigger nets in a chip circuit netlist under detection, and give results of suspiciousness values for each net. By flagging the top 2% suspicious nets of each detection model as the suspicious Trigger nets based on the suspiciousness values, the proposed method can achieve, on average, 88% true positive rate, 96% true negative rate, and 96% accuracy.