Novel Memristor-based Nonvolatile D Latch and Flip-flop Designs

Zhenxing Chang1, Aijiao Cui1, Gang Qu2, Ziming Wang1
1Harbin Institute of Technology Shenzhen Graduate School, 2Univ. of Maryland, College Park


Sequential devices are fundamental building blocks for almost all digital electronic systems with memory. Due to the importance of instant data recovery after unexpected data loss such as unplanned power down, sequential devices need to have the nonvolatile property. Nonvolatile memristor has been exploited to be integrated with the CMOS devices for this purpose. In this paper, we propose to improve the quality of nonvolatile D latch by integrating memristor into CMOS devices. Unlike the structure of conventional design, the proposed D latch has only several transmission gates, CMOS inverters and a memristor. Our design overcomes the negative effect due to the threshold loss of the transistors. As simulation shows, the new memristor-based D latch can support the memristor to switch between different resistance states 2.3X-3.6X faster than the current design, and thus achieving a clock of higher frequency. In addition, our design allows the threshold value of the memristor to be selected from a much wider range. As an application, we use the proposed D latch to implement a nonvolatile master-slave D flip-flop which has smaller delay than all the state-of-the-art designs with smaller area then all but one of them. In sum, our design improves the quality of memristor-based D latch and D flip-flop in terms of latency, area, and flexibility of threshold voltage selection.