True Random Number Generation using Latency Variations of Commercial MRAM Chips

Farah Ferdaus1, Bashir Mohammad Sabquat Bahar Talukder1, Mehdi Sadi2, Md Tauhidur Rahman1
1Florida International University, 2Auburn University


The emerging magneto-resistive RAM (MRAM) has considerable potential to become a universal memory technology because of its several advantages: unlimited endurance, lower read/write latency, ultralow-power operation, high-density, and CMOS compatibility, etc. This paper will demonstrate an effective technique to generate random numbers from energy-efficient consumer-off-the-shelf (COTS) MRAM chips. In the proposed scheme, the inherent (intrinsic/extrinsic process variation) stochastic switching behavior of magnetic tunnel junctions (MTJs) is exploited by manipulating the write latency of COTS MRAM chips. This is the first system-level experimental implementation of true random number generator (TRNG) using COTS toggle MRAM technology to the best of our knowledge. The experimental results and subsequent NIST SP-800-22 suite test reveal that the proposed latency-based TRNG is acceptably fast (~22 Mbit/s in the worst case) and robust over a wide range of operating conditions.