Error Coverage, Reliability and Cost Analysis of Fault Tolerance Techniques for 32-bit Memory in Space Applications

david freitas1, david mota1, Daniel Simões1, Clailton Lopes1, roger goerl2, César Marcon3, Jarbas Silveira4, João Mota1
1ufc, 2PUC-RS, 3PUCRS, 4Universidade Federal do Ceará


The sensitivity of integrated circuits to radiation increases dramatically as the voltage in the integrated circuits decreases, affecting memory cells. Although there are several error-correcting code (ECC) studies in memory during space applications to prevent failures, there is no consensus on the choice of code, considering the good fault correction capability and cost. This paper aims to present, implement and discuss different ECC configurations for use in 32-bit memories during space applications. Two failure injection analyzes are tested: i) adjacent errors and ii) all possible combinations in 32-bit memory up to five bit flips. In this work, two tests were performed, one considering only adjacent errors and the other with all upsets combinations.