In this article we propose a systematic method to study how increasing use of double-row height cells would impact placement and routability of a circuit. To facilitate our study, we handcraft 87 standard cells, each of which has two layouts of the same area, one designed with single-row height and the other designed with double-row height. Experimental results show that the compromise made by placement, ending up degraded routability, for handling double-row height cells reaches its peak when a circuit has about 30% of the cells being double-row height cells if placement is done with a core utilization of 90%. It is about 40% if a core utilization of 80% is employed.