A Comprehensive Evaluation of Power Delivery Schemes for Modern Microprocessors

Jawad Haj-Yahya1, Efraim Rotem2, Avi Mendelson3, Anupam Chattopadhyay4
1School of Computer Science and Engineering, Nanyang Technological University, 2CPU Architect, Intel, Israel, 3EE and CS Technion, Israel, 4Nanyang Technological University


The continuous quest for energy-efficient computing has led towards the adoption of fine-grained controls in processor sub-systems, of which power delivery network is the most prominent one. Recent industry trends reflect a shift towards on-chip, integrated voltage regulator (IVRs) to that effect. We undertake a thorough and quantitative evaluation of different power delivery networks for modern microprocessors. In contrast to the current trend, we conclude that IVR schemes perform worse compared to the conventional off-chip voltage regulator scheme. Further, we present studies on diverse workloads and Thermal Design Points (TDPs) to highlight the importance of workload-specific power delivery scheme. To the best of our knowledge, this is the first comprehensive study across processors' TDPs and workloads.