Recent results in power modeling for the emerging IEEE Standard Association project P2416 are presented. The standard promises to bring accurate power-modeling capability to system-level digital design tools. This paper presents the leakage power-model characterization approach in detail in the context of a simple four-gate circuit. Simulation results with a commercial 45nm technology over a range of temperatures and supply voltages show agreement with SPICE to within 1.8% on average and 16.6% in the worst case with a speedup of over 15,000X.