Back-Bias Generator for Post-Fabrication Threshold Voltage Tuning Applications in 22nm FD-SOI Process

Abstract

This paper provides design and implementation of silicon-validated Back-Bias Generator (BBGEN) for Forward Back-Bias (FBB) operation of transistor devices in 22FDX Fully Depleted Silicon-On-Insulator (FD-SOI) process. The design has been used to drive multiple Ring Oscillators (RO) and silicon measurement shows the enhancement in maximum frequency (fmax) with the application of FBB. BBGEN consists of two independently controlled back-bias sections to provide FBB to both NMOS and PMOS devices. This architecture has also been implemented for device trimming applications to enhance the performance of slow devices towards typical performance by the application of Threshold Voltage (VT) tuning using FBB.