A Low-Power Configurable Adder for Approximate Applications

Tongxin Yang, Tomoaki Ukezono, Toshinori Sato
Fukuoka University


Addition is a key fundamental function for many error-tolerant applications. Approximate addition is considered to be an efficient technique for trading off energy against performance and accuracy. This paper proposes a carry-maskable adder whose accuracy can be configurable at runtime. The proposed scheme can dynamically select the length of the carry propagation to satisfy the quality requirements flexibly. Compared with a conventional ripple carry adder and a conventional carry look-ahead adder, the proposed 16-bit adder reduced power consumption by 54.1% and 57.5%, and critical path delay by 72.5% and 54.2%, respectively. In addition, results from an image processing application demonstrate that the quality of the processed images can be controlled by the proposed adder design.