Process variation can have significant impact on device and interconnect performance, especially in the presence of crosstalk. A key technique to reduce crosstalk analysis pessimism is to consider timing window overlap of electrically coupled signals. SSTA timing windows tend to be larger than their corner counterparts resulting in pessimistic timing window overlap analysis, hence overestimating crosstalk impact. This paper describes an efficient method to remove die-to-die as well as common portion of within-die pessimism of the timing window overlap analysis. This approach has been implemented in an industrial timing analysis tool and experimental results show significant accuracy improvement and pessimism reduction compared to the existing techniques.