Due to large power grid sizes, IR-drop analysis is a computationally challenging design flow step that is commonly used in integrated circuit design. Variability in silicon and circuit operating conditions makes IR-drop analysis even more challenging. We introduce a flow to make this analysis efficient by utilizing a hybrid CPU and graphical processing unit (GPU) implementation. We introduce variability analysis for the power grid elements as well as the current drawn from nodes. Our approach provides speed savings over two orders of magnitude and enables simulation of one million Monte Carlo samples within few hours possible.