Adaptive Power Gating for Function Units in a Microprocessor

Kimiyoshi Usami1,  Tatsunori Hashida1,  Satoshi Koyama1,  Tatsuya Yamamoto1,  Daisuke Ikebuchi2,  Hideharu Amano2,  Mitaro Namiki3,  Masaaki Kondo4,  Hiroshi Nakamura5
1Shibaura Institute of Technology, 2Keio University, 3Tokyo University of Agriculture and Technology, 4The University of Electro-Communications, 5The University of Tokyo

Abstract

This paper describes adaptive fine-grain control to power gate function units based on temperature dependent break-even time (BET). An analytical model to express the temperature dependent BET is introduced and the accuracy of the model was examined. Results demonstrated that the model well represents the exponential decrease in BET with the temperature. Meanwhile, it was found that the accuracy gets worse at higher temperature and the cause is energy dissipation due to transient glitch at the wakeup. We propose four power-gating policies employing time-based or history-based approaches. Effectiveness in energy savings was evaluated using real design data of four function units in a microprocessor implemented in a 65nm technology. Results showed that introducing adaptive control to make use of temperature-dependent BET enhances energy savings by up to 13% in the time-based approach and by up to 18% in the history-based approach. The adaptive history-based policy with a limiter outperforms the adaptive time-based policy in energy savings and reduces the total energy of four function units up to 11.8% at 100C as compared to the non-power-gating case.