Ground bouncing noise produced during the reactivation events is an exacerbating challenge to maintain data reliability and correct logic levels in Multi-threshold CMOS (MTCMOS) circuits. Two noise-aware MTCMOS circuits with a novel dynamic forward body bias technique are proposed in this paper to minimize the ground bouncing noise with smaller sleep transistors. The dynamic-forward-body-biased MTCMOS circuits lower the peak ground bouncing noise by up to 27.76% while reducing the size of the additional sleep transistors by up to 85.71% as compared to the previously published noise-aware MTCMOS techniques with standard zero-body-biased high threshold voltage sleep transistors. The design tradeoffs between the ground bouncing noise and the leakage power consumption in different MTCMOS circuits are evaluated with a UMC 90nm CMOS technology.