An Unified FinFET Reliability Model Including High K Gate Stack Dynamic Threshold Voltage, Hot Carrier Injection, and Negative Bias Temperature Instability

Chenyue Ma1,  Bo Li2,  Lining Zhang1,  Jin He1,  Xing Zhang1,  Xinnan Lin2
1TSRC, Key Laboratory of Microelectronic Devices and Circuits of Ministry of Education, Institute of Microelectronics, EECS, Peking University, Beijing, P.R.China, 2The Micro- & Nano Electronic Device and Integrated Technology Group, The Key Laboratory of Integrated Microsystems, Shenzhen Graduate School of Peking University, Shenzhen, P. R .China

Abstract

A unified FinFET reliability model including high K stack dynamic threshold, hot carrier injection (HCI), and negative bias temperature instability (NBTI) has been developed and verified by experimental data. The FinFET-based circuit performances are simulated and compared under these reliability issues by HSPICE simulator after the inclusion of the presented model.