hArtes Design Flow for Heterogeneous Platforms

Muhammad Rashid1,  Fabrizio Ferrandi2,  Koen Bertels3
1Thomson R&D France, 2Politecnico di Milano, Dipartimento di Elettronica Informazione, Italy, 3Computer Engineering Department, Delft University, Netherland


Abstract

The hArtes -Holistic Approach to Reconfigurable real Time Embedded Systems- design flow addresses the development of an holistic (end-to-end) tool-chain for reconfigurable heterogeneous platforms. The entire tool-chain consists of three phases: Algorithm Exploration and Translation, Design Space Exploration and System Synthesis. This paper presents and evaluates the tools in the Design Space Exploration phase and the System Synthesis phase. The tools in the Design Space Exploration phase facilitate task partitioning, task optimization and assignment of the tasks to the appropriate hardware element. The tools in the System Synthesis phase facilitate the hardware/software co-design of embedded applications and perform compilation and HDL generation. The XML Architecture Description File and the C Pragma Notations are used for information exchange between different tools. Experimental results with the H.264 video encoding application shows the viability of the hArtes design flow.