A generic carrier-based core model for undoped four-terminal double-gate (DG) MOSFET valid for symmetric, asymmetric, SOI, and independent gate operation modes is presented in this paper. Based on the exact solution of the 1-D Poisson’s equation of a general DG-MOSFET configure, a generic drain current model is derived from Pao-Sah’s double integral in terms of the carrier concentration. The model is verified by extensive comparisons with 2-D numerical simulations under different bias conditions to all four terminals. The concise mathematic formulation allows the unification various double-gate models into a carrier-based core model for compact DG-MOSFET model development.