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Description: No question, DFM adds to designer’s workload, generating reams of data that point to possible errors, but doesn’t directly fix them. What does a designer do with all that information? Can it be used as a competitive ‘lever,’ telling designers how far they can push a design without a creating manufacturing disaster. Or is DFM ignorance bliss? |
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Panelists:
Dr. Ara Markosian directs all advanced development efforts for Ponte Solutions. Prior to co-founding Ponte, Ara held positions as director of engineering at Monterey Design Systems and Aristo Technology Ara holds a Master of Science in Computer Science and Mathematics from Yerevan State University, and a PhD in Computer Sciences and Mathematics from the Academy of Sciences of the USSR, Moscow. Ara has published multiple technical papers related to design automation and holds four US patents |
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Walter Ng is responsible for identifying, developing and executing customer and partner alliances that advance the adoption of Chartered’s solutions for the leading-edge and mainstream technology nodes. Prior to working at Chartered, Walter held multiple management positions as companies including Cadence, Sequence Design, and Raytheon. Walter holds a B.S. in Electrical Engineering from the University of Massachusetts, Amherst, and an M.B.A from the University of Massachusetts, Boston.
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Dr. Yervant Zorian has served as Virage Logic’s Vice President and Chief Scientist since joining the company in 2000. Prior to Virage, Dr. Zorian served as a Distinguished Member of the Technical Staff at Lucent Technologies, Bell Laboratories and Chief Technical Advisor to LogicVision. He founded and presently chairs the IEEE 1500 standardization working group for embedded core test, and has authored over 250 papers and four books.
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Dr. Riko Radojcic is a leader of Design to Silicon Initiatives, addressing Design for Manufacturability methodologies at polygon, timing and logic design levels for Qualcomm CDMA. Prior to that he was Director of Business Development and Marketing for DFM Solutions, at PDF Solutions, Inc. Dr. Radojcic has also held management positions at Tality, Inc, Cadence, Unisys and Burroughs. He received his BSc and PhD degrees from University of Salford, UK.
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Tim Horel is currently the senior director of hardware operations at M2000, Inc. He began his career in 1981 at IBM's Advanced Technology group in Burlington Vermont. He later joined Sun Microsystems where he drove physical design on the main line Ultra SPARC III processors including the first and last devices in this product line delivered to market. Mr. Horel received his BS in Electrical Engineering from the State University of New York at Buffalo in 1981.
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Richard Brashears is a corporate vice president in the Manufacturing Modeling and Implementation Technologies Organization. Since 2001, he has focused on the development of sub-wavelength automated layout solutions. Beginning his career at Cadence in 1990, Richard has held a variety of Field Operations and Research & Development positions. Mr. Brashears received his Bachelor of Science in Electrical Engineering and Computer Science from the University of California at Berkeley
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