Session 5A

San Carlos Room

10:30AM - 12:00PM

Design Methods and Tools in DSM

Chairs:    Vamsi Srikantam, Agilent Laboratories

James Lei, Altera

10:30am

Introduction

10:35am

5A.1       

ASLIC: A Low Power CMOS Analog Circuit Design Automation

Jihyun Lee, Yong-Bin Kim

11:05am

5A.2       

Modeling MOS Snapback for Circuit-Level ESD Simulation Using BSIM3 and VBIC Models

Yuanzhong (Paul) Zhou, Duane Connerney, Ronald Carroll, Timwah Luk, Fairchild Semiconductor

11:35am

5A.3       

A Mask Reuse Methodology for Reducing System-on-a-Chip Cost

Subhrajit Bhattacharya, John A Darringer, Daniel L. Ostapko, Youngsoo Shin, IBM