The 2nd IEEE International Symposium on Quality Electronic Design, ISQED 2001, was successfully held on March 26 through March 28, in DoubleTree hotel, San Jose, CA. Repeating the successful inaugural ISQED event of year 2000, the Organizing and Technical committees as well as all the technical contributors and speakers made tremendous efforts to make this a premier conference and a valuable event, worthy of participation. The symposium drew more a large number of attendees indicating the growing importance of the design quality.  Since the ISQED missions is to promote the communication and close cooperation between all the disciplines involved with the electronic design it was very encouraging that this year’s audiences, similar to the last year, came from not only the design community but also included strong participation from EDA, software, Semiconductor, and other disciplines. About 20 countries were represented in the conference, through papers, panels, and tutorials, spanning more than 200 organizations worldwide. The quality of keynote speeches, panels, tutorials and technical sessions were impressive throughout the event. ISQED 2001 was sponsored by the IEEE computer society, technical committees on TTTC, VLSI & Design Automation, and was held in cooperation with FSA, and sigDA/ACM. The conference media and industrial support was provided by EE Times, ISD Magazine, Synopsys, Cadence Design Systems, Fujitsu Microelectronics, Intel, Sun Microsystems, Monterey Design, Numerical Technologies, UMC Group (USA), Artisan Components, Nassda, PDF Solutions, Dolphin Technologies, and Tavanza. In his opening remark, Ali Iranmanesh, the ISQED founder and chair, said that “As ISQED enters its 3rd year of existence, I remain convinced that to achieve total design quality, the design process and tools needs to be critically reexamined and time proven quality principles and measures should be applied not only to the manufacturing process, as have been done so successfully in the past, but also needs to be applied to Design tools, and methodologies, design process, and infrastructures. He stressed further, that ISQED vision remains to promote and facilitate the development of quality metrics for quantitative assessment of quality as well as development of standards and procedures for quality design, and standard for tools, flows, processes, and infrastructures.

Plenary Sessions

One of the key features of ISQED 2001 was the excellent keynote speech by several world-renowned leaders, from the industry and academia. A total of eight keynote speeches were delivered in two plenary sessions held on Tuesday and Wednesday morning. Chi-Foon Chan, president and COO of Synopsys, and a member of ISQED advisory committee, chaired the plenary session on Tuesday morning. Hajime Sasaki, chairman of the board of NEC, was the first keynote speaker in this session. In his speech titled: “Future Platform for Mobile Communication”, Sasaki described the power consumption as a major concern in the future adoption of platforms for mobile communications. He also stressed his belief that mobile communications devices will soon supplant the PC as the main driver for growth in the semiconductor industry. The title of the second keynote speech by Joe Costello, chairman and CEO of think3, was “Delivering Quality Delivers Profits”. In his talk, Costello defined SoC quality as “First Silicon Success”. System on chip (SoC) is the fastest growing design segment, driven by the demands of the consumer-driven marketplace, Costello said. In the next plenary speech, Raul Camposano, CTO and General Manager of Synopsys, outlined the principle types of formal verification techniques in use. The title of his speech was “The Expanding Use of Formal Techniques in Electronic Design”. The last keynote speaker on Tuesday plenary session was Edward Ross (President, TSMC USA). Title of his talk was “IC Design Methodology in the Foundry Era: Introducing ‘Heads-Up’ Design”. In his speech Ross discussed emerging trends in the EDA, IP, library and design center communities, wherein deep collaboration with foundries is producing a variety of Internet-based solutions that are revolutionizing IC design methodologies. The second plenary session was held on Wednesday morning, March 28, and was chaired by Resve Saleh, ISQED’01 technical program chair, and Kris Verma, ISQED’01 plenary committee chair. The first keynote speaker in this session was Wojciech P. Maly, Professor, Carnegie Mellon University, who talked about Quality of Design from an IC Manufacturing Perspective. After that, Vinod Agrawal, CEO of Logic Vision, described Embedded Test Leads to Embedded Quality. Aki Fujimura, COO and President of Simplex, was the next keynote speaker with his talk titled:  “Quality on Time”. The final keynote speaker was Philippe Magarshack, Vice President, Central R&D Group and Director, Design Automation, STMicroelectronics with his talk titled: “Quality of SoC designs through quality of the design flow: Status and Needs”. In future the video tape and presentation slides of all the plenary speakers will be made available through the conference web site at http://www.isqed.org.

ISQED Panels

Three panel discussions with over 20 top specialists pondered on key design and quality topics and issues. The first panel discussion titled " The 50-Million Transistor Chip: The Quality Challenge for 2001” was organized by Rick Merrit of EETimes, and moderated by Richard Goering of EETimes. This panel was held after the dinner reception on Monday evening. The panelist list included Thomas Daniel of LSI Logic, Bryan Hoyer of Altera, Chris Malachowsky of Nvidia, Janusz Rajski of Mentor Graphics, Greg Spirakis of Intel, and Tom Williams of Synopsys. The panel explored the growing complexity of verification in electronic design and attempted to answer the provocative question of "How much verification is enough?" The second panel discussion was organized by Bill Alexander, and moderated by Jacques Benkowski, both from Monterey Design Systems. The panel was conducted after the dinner reception on Tuesday evening. This panel was titled "0.13 micron: Will the Speed Bumps Slow the Race to Market?”. Panel participants were; Jim Ballingall of UMC USA, Guy Dupenloup of LSI Logic, Dave Hanson of PDF Solutions, Christian Herdt of Compaq Computer, Charlie Huang of CadMos, and Atul Sharan of Numerical Technologies. The panelists shared their experiences, as well as methods, and tools that they use to tackle the 0.13 micron challenges and to accelerate design productivity. Finally a panel representing scientists, electronics and design executives, shared their visions, experiences and concerns regarding the impact of electronic design on (quality of) our life. This embedded panel was titled “Consequences of Technology - What is the Impact of Electronic Design on the Quality of Life?”. The panel was organized by Nader Vasseghi of AuroraNetics, and Gabriele Eckert of RubiCad, and was moderated by Steve Ohr of EDTN Networks. Panel participants included: Sabrina Kemeny of Photobit, Tom Mahon of Thomas Mahon & Associates, Peter G. Neumann of SRI, Peggy Aycinena of ISD Magazine, Joe Hall of Clarus, and Bryan Hoyer of Altera. Videotape of the panel discussions will be made available at a later time for those interested.

Technical Papers and Awards

A great collection of papers from IC design, EDA, test, equipment, universities, and semiconductor were presented in eleven sessions. The technical committee members selected these papers for presentation from many excellent submissions.  This year, a total of 36 papers were accepted for oral presentation from 93 papers submitted to ISQED 2001. An additional 18 papers were accepted for poster presentation. The technical program also includes 13 invited papers from leading experts in the field.  ISQED awarded two best papers during the Tuesday plenary session. In addition, the best PhD student paper was also awarded during the same session.

Jayant Deodhar of Intel, and Spyros of Southern Illinois University received award for their paper titled: "Color Counting and its Application to Path Delay Fault Coverage". The second award went to Andrew B. Khang, and Stefanus Mantik of UCLA for their paper titled: "A System for Automatic Recording and Prediction of Design Quality Metrics". This year ISQED also featured a Ph.D. Student forum. The best Ph.D. student forum paper was awarded to Tung-Yang Chen, and Ming-Dou Ker for the poster paper titled: “Design on ESD Protection Circuit with Very Low and Constant Input Capacitance”. Resve Saleh, the technical program chair, and Kaushik Roy, the Ph.D. student forum chair, presented the authors with a plaque and a check for $600 to be shared among the authors of each paper. The Best Paper Award committee reviewed all entries and narrowed the field down to six finalist papers; then, the two winners were selected from this group. Similarly the Ph.D. student forum committee selected the winner from the final list of seven selected papers.

ISQED Tutorials

This year, due to popular demand, the popular tutorial sessions were expanded to four tracks, with a total of twelve sessions. The tutorial session covers a variety of critical and timely topics such as Embedded Test Strategies for SoC, Design and Test of Low Voltage CMOS Circuits, Redundancy Requirements for Embedded Memories, Design Metrics for achieving Design Quality, Fundamental Methods to Enable SoC Design and Reuse, Deep Sub-micron State-of-the-Art ESD design, Application of Formal Verification to Design Creation and Implementation, Verification and Validation of Complex Digital Systems, Physical Verification of DSM designs, Re-Connecting MOS Modeling and Circuit Design, Interconnect Modeling for Timing, Signal Integrity and Reliability, as well as On-Chip inductance extraction and modeling.

The complete list of all tutorials was as follows:

• System-on-Chip: Embedded Test Strategies Design and Test of Low Voltage CMOS Circuits Redundancy Requirements for Embedded Memories

• Design Metrics to achieve Design Quality

• Fundamental Methods to Enable SoC Design and Reuse

• Issues in Deep Sub-micron State-of-the-Art ESD design

• Application of Formal Verification to Design Creation and Implementation

• Verification and Validation of Complex Digital Systems: An Industrial Perspective

• Physical Verification at 0.13 Micron and Below

• Re-Connecting MOS Modeling and Circuit Design: New Methods for Design Quality

• Interconnect Modeling for Timing, Signal Integrity and Reliability

• On-Chip inductance extraction and modeling

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