Session 5C
Wednesday 3/22/00
3:25pm-5:35pm
VDSM Capacitive & Inductive Coupling Issues
Tak Young, Synopsys, Eileen Hong You, Sun MicrosystemsCo-Chairs:
3:25pm
Introduction
3:30pm
5C.1
Coupling Noise Analysis for VLIS and ULSI CircuitsKathirgamar Aingaran, Fabian Klass, Chin-Man Kim, Chaim Amir, Joydeep Mitra, Eileen You, Jamil Mohd and Sai-Keung Dong, Sun Microsystems Inc., Palo Alto, CA
3:55pm
5C.2
Efficient Delay Calculation in Presence of Crosstalk Tong Xiao, Malgorzata Marek-Sakowska, University of Santa Barbara, CA4:20pm
5C.3
Crosstalk Aware Static Timing Analysis: A Two Step ApproachBruno Franzini, Cristiano Forzan, Davide Pandini, Primo Scandolara Alessandro Dal Fabbro, STMicroelectronics, Agrate Brianza, Italy
4:45pm
5C.4
Deep Sub-Micron Static Timing Analysis in the Presence of CrossTalkPeivand F Tehrani, Shang Chyou, Uma Ekambaram, Synopsys, Thousand Oaks, CA
5:10pm
5C.5
Quick On-Chip Self- and Mutual-Inductance Screen Shen Lin, Norman Chang, Sam Nakagawa, HP, Palo Alto, CAHome| | Conference| | Committee| | Sponsors| | Resources| | Registration| | News |
International Symposium
on Quality of Electronic Design |