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Session 2A
Tuesday 3/21/00
3:25pm - 5:35pm
Quality of Design and EDA Tools
Co-Chairs: George Alexiou, University Of Patras, Patras, Greece, Kevin Lashkari, Ultratech Steppers
3:25pm
Introduction
3:30pm
2A.1
Quality-Driven System on Chip Design (Invited)Lech Józwiak Eindhoven University of Technology, Eindhoven, The Netherlands
3:55pm
2A.2
Advancing Customer-Perceived quality in the EDAIndustry (Invited)
Ben-Yaacov, Larry Bjork, and Ed Stone, Synopsys, Mountain View, CA
4:20pm
2A.3
Quality Memory Blocks - Balancing The Trade-offs (Invited)Betty Prince, Memory Strategies International, Leander, Texas, USA
4:45pm
2A.4
Should Yield be a Design Objective? (Invited)Israel Koren, University of Massachusetts, Amherst, MA
5:10pm
2A.5
Early Addressing IC and Packaging Relationship Allows an Overall Better Quality of Complex SoCAnna Fontanelli, Roberto Branco and Giorgio Mastrorocco
STMicroelectronics, Agrate Brianza, Italy
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International Symposium
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