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Session 1B

Tuesday 3/21/00

1:25pm 3:10pm


DSM Modeling


Co-Chairs: Resve Saleh, Simplex Solutions, Antonio Nunez, University of Las Palmas GC, Spain





1B.1 Transistor Modeling for the VDSM Era (Invited)

Michael S. Shur, Rensselaer Polytechnic Institute, Troy, NY


1B.2 A Statistical Model for Electromigration Failures

Gilbert Yoh* and Farid N. Najm**, *Agilent Technologies, Fort Collins, Colorado, **University of Toronto, Toronto, Ontario, Canada


1B.3 An Analytical Model for Delay and Crosstalk Estimation with Application to Decoupling

Murat Becer and Ibrahim N. Hajj, University of Illinois at Urbana-Champaign, IL


1B.4 Power Macromodeling For An High Quality Rt-level Power Estimation

Massimo Rossello*, Roberto Zafalon*, Massimo Poncino** and Enrico Macii**, *ST Microelectronics, Agrate Brianza, Italy, **Politecnico di Torino, Dip. Automatica e Informatica, Torino, Italy

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International Symposium on Quality of Electronic Design
Copyright 1998 ISQED. All rights reserved.
Revised: May 13, 2001 .