1:25pm

Introduction

1:30pm

1B.1 Transistor Modeling for the VDSM Era (Invited)

Michael S. Shur, Rensselaer Polytechnic Institute, Troy, NY

1:55pm

1B.2 A Statistical Model for Electromigration Failures

Gilbert Yoh* and Farid N. Najm**, *Agilent Technologies, Fort Collins, Colorado, **University of Toronto, Toronto, Ontario, Canada

2:20pm

1B.3 An Analytical Model for Delay and Crosstalk Estimation with Application to Decoupling

Murat Becer and Ibrahim N. Hajj, University of Illinois at Urbana-Champaign, IL

2:45pm

1B.4 Power Macromodeling For An High Quality Rt-level Power Estimation

Massimo Rossello*, Roberto Zafalon*, Massimo Poncino** and Enrico Macii**, *ST Microelectronics, Agrate Brianza, Italy, **Politecnico di Torino, Dip. Automatica e Informatica, Torino, Italy