Reliable Memory PUF Design for Low-Power Applications

Mohammad Saber Golanbari, Saman Kiamehr, Rajendra Bishnoi, Mehdi Tahoori
Karlsruhe Institute of Technology


This paper presents a reliable memory-based Physical Unclonable Function (PUF) design for operating at low supply voltages, which is typically demanded in emerging Internet of Things (IoT) applications with stringent energy constraints. PUF is a promising approach for generating unique and secure IDs based on the intrinsic uncontrollable manufacturing process variation. A common approach is to use the power-up values of SRAM memory arrays as the PUF response. However, reliability of the PUF response is a major concern for such designs, in particular, at low supply voltage values where the impact of noisy operating environment becomes significant. As a result, a noisy PUF response due to the non-ideal reliability at low supply voltages, has to be transformed into a stable high-entropy key by a key extractor circuitry, which imposes significant area and power overhead. The proposed PUF design in this paper has the advantage of being highly reliable at low supply voltages allowing aggressive supply voltage reduction for lower power consumption and better energy efficiency with lower area and overhead of key extractor. In this paper, we first evaluate the reliability of the SRAM-based PUFs over a wide range of supply voltages from the super-threshold voltage regime down to the Near-Threshold Voltage (NTV) regime. Based on this analysis, we propose a new memory-based PUF design which provides higher reliability (2.6× improvement) while consuming less power (∼ 2×) compared to the traditional SRAM PUF designs in the NTV region.