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IEEE ISQED 2000 FINAL PROGRAM


SUMMARY
The conference will be held on Monday March 20, through Wednesday March 22, in DoubleTree Hotel in San Jose, CA, USA. A full day tutorials will be held on Monday, March 20. There will be a total of 15 tutorial sessions, delivered by 25 leading experts. The conference starts on Monday evening with reception and panel discussions. This would be the 1st of five panel discussions held throughout the ISQED 2000. More than 30 experts are participating in these panels. The conference includes two plenary sessions, held on Tuesday and Wednesday mornings respectively. 
Plenary sessions feature seven keynote speeches by industry and academia leaders. There will be 12 other technical sessions, composed of 65 papers on Tuesday and Wednesday. ISQED features two luncheons and two evening 
receptions. Best paper awards will be presented during Tuesday luncheon.

CONFERENCE OVERVIEW

Date Time Room 1 Room 2 Room 3
Mon.
3/20/00

 

8:30am- 5:00pm Tutorial Track I
Design for Reliability & Manufacturability
Tutorial Track II
Design for Quality
Tutorial Track III
Closing the Manufacturing Loop
6:30pm-8:30pm

Evening Reception & Panel Discussion
Reception Sponsored by UMC Group (USA)

Panel Discussion 1:
How to select a high quality software EDA tool? 

Tue.
3/21/00
9:00am-12:00pm

PLENARY SESSION I

Keynote speeches by:
Aart J. de Geus, John East, Prakash Agrawal, John Kibarian

12:00pm-1:25pm

LUNCHEON
Sponsored by Synopsys
Best Paper Awards
Luncheon Speech:
Achieving Quality; Integration of Third Party Tools into LSI's Flow

1:25pm-3:10pm SESSION 1A: Panel Discussion 2
What is design quality? Can quality in electronic design be quantified, and how?
SESSION 1B

DSM Modeling  
SESSION 1C

Emerging Process and Device Technology  
3:10pm-3:25pm

BREAK

3:25pm-5:35pm SESSION 2A

Quality of Design and EDA Tools

SESSION 2B

Emerging Integrity Issues

SESSION 2C

Low Power Test

6:30pm-8:30pm

Evening Reception & Panel Discussion
Reception Sponsored by EE Times

Panel Discussion 3:
The hidden costs of design quality

Wed.
3/22/00
8:45am-10:15am

PLENARY SESSION II

Keynote speeches by:
Alberto Sangiovanni-Vincentelli, Yervant Zorian, Kamran Eshraghian

10:15am-10:40am

BREAK

10:40am-12:00pm SESSION 3A

Quality in IP Blocks
SESSION 3B

Quality Issues with Emerging Processes
SESSION 3C

Poster papers
12:00pm-1:25pm

LUNCHEON

Sponsored by Fujitsu Microelectronics

1:25pm-3:10pm SESSION 4A: Panel Discussion 4
Focus on quality of design: Does it help or hinder time to market?
SESSION 4B

Quality Definition and Metrics  
SESSION 4C

Low Power Design & Test  
3:10pm-3:25pm

BREAK

3:25pm-5:35pm SESSION 5A: Panel Discussion 5
Design-manufacturing interface in deep sub micron era: Is technology independent design dead?  
SESSION 5B

Design for Manufacturability  
SESSION 5C

Capacitive/Inductive Coupling Issues  


To view the final program in PDF format, click here


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International Symposium on Quality of Electronic Design
Copyright 1998 ISQED. All rights reserved.
Revised: May 13, 2001 .